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Dynamic random access memory device having an improved timing arrangement
| Details |
Inventors: Miyatake, Hideshi; Kumanoya, Masaki; Hidaka, Hideto; Konishi, Yasuhiro; Dosaka, Katsumi; Yamasaki, Hiroyuki; Shimoda, Masaki; Ikeda, Yuto; Tsukamoto, Kazuhiro;
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)
Primary Examiner: Hecker; Stuart N.
Assistant Examiner: Gossage; Glenn A.
Attorney, Agent or Firm: Sughrue, Mion, Zinn, Macpeak and Seas
A dynamic random access memory device having an input/output load connected between a pair of input/output lines and a control circuit used to generate an internal /RAS signal having a reset transition delayed with respect to the same transition of the external /RAS signal. The internal /RAS signal controls at least a word signal applied to a transistor of a selected memory cell and an enable signal applied to an enable transistor, whereby the time the transistor of the memory cell and the enable transistor become non-conductive is delayed with respect to the time at which a transfer transistor connected between each pair of bit lines and the input/output lines becomes non-conductive. |
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DETAILED DESCRIPTION Accordingly, it is an object of the present invention to provide a D-RAM device with an input/output load connected to a pair of input/output lines, as in the device described above, but with which the incorrect information cannot be read out.
In accordance with this and other objects, the present invention provides a D-RAM device having an input/output load and which has a control circuit which generates an internal /RAS signal in response to the external /RAS signal.
The reset timing of the internal /RAS signal is delayed with respect to the external /RAS signal.
The internal /RAS signal controls at least the word signal which enables the selected memory cell and the enable signal which enables the sense amplifier, whereby the time the transistor of the memory cell and the enable transistors are rendered nonconductive is delayed from the time at which the transfer transistor is rendered nonconductive.
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