First-in, first-out (FIFO) buffer

DETAILED DESCRIPTION OF A PREFERRED EMBODIMENT Reference is now made to FIGS.
1 and 2 which illustrate the variable sized first-in, first-out (FIFO) buffer of the present invention.
The variable sized FIFO of the present invention comprises an upper FIFO buffer 10, a lower FIFO buffer 12, a random access memory (RAM) element 14 and a controller 16.
Each FIFO buffer operates as a regular FIFO buffer with read and write pointers indicating the locations therein from which to read and into which to write, respectively.
Furthermore, as indicated by the arrows in FIG.
1, each FIFO buffer is a dual port buffer (having separate input and output arrows) while the RAM 14 is a single port buffer (having a single, double headed input/output arrow).
In accordance with the present invention, the controller 16 has two modes of operation.
In the first mode, when the lower FIFO buffer 12 is not full, the controller 16 propagates data directly from the upper FIFO buffer 10 to the lower FIFO buffer 12.
Once the lower FIFO buffer 12 is full, the controller 16 directs the data propagated through the upper FIFO buffer 10 to the RAM 14.
To optimize bandwidth, data is written to RAM 14 in blocks, typically of 8 bytes or words.
Whenever there is data within the RAM 14 and lower FIFO buffer 12 is less than full, controller 16 writes into the lower FIFO buffer 12 from the RAM 14 in blocks.
Whenever all of the data within RAM 14 has been read out, controller 16 returns to propagating data directly from the upper FIFO buffer 10 to the lower FIFO buffer 12.
It will be appreciated that the RAM 14 provides the variable size and is utilized only when data can no longer flow between the upper and lower FIFO buffers, due to the lower FIFO buffer being temporarily full.
As can be seen, the present invention combines FIFO buffers for receiving and sending data with a RAM memory element.
Since RAMs are extremely common, relatively inexpensive and are relatively high density memory elements, the present invention provides large sized FIFO buffers without the attendant cost