Circuit for designating instruction pointers for use by a processor decoder |
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Methods and apparatus for translating incompatible bus transactions |
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Data-array processing system wherein parallel processors access to the memory system is optimized |
| OF THE PREFERRED EMBODIMENTS Preferred embodiments of the invention will now be described, by way ... |
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Video signal memories |
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Obtaining access to a two-dimensional portion of a digital picture signal |
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Devices, systems and methods for accessing data using a pixel preferred data organization |
| According to the invention, a processing system is provided operating on data words each having at ... |
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Display apparatus |
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Video timing and display ID generator |
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Input level detection circuit
| Details |
Inventors: Moench, Jerry O.;
Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA)
Primary Examiner: Callahan; Timothy P.
Assistant Examiner: Ton; My-Trang Nu
Attorney, Agent or Firm: Foley & Lardner
An apparatus for activating a dual-mode logic device is provided. The apparatus monitors a parameter of an input signal of the logic device. If the parameter falls outside of predetermined parametric ranges, the apparatus activates the logic device. In the preferred embodiment, the apparatus resides on the same semiconductor chip as the logic device, and monitors the voltage level of the input signal. If the voltage level falls outside the voltage range which represents a logical HIGH and the voltage range which represents a logical LOW, the apparatus activates the logic device. |
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DETAILED DESCRIPTION According to one aspect of the present invention, an apparatus for activating a logic device when the logic device is required to perform an operation is provided. The logic device is configured to receive an input signal on a first line and an activation signal on a second line. The logic device is further configured to assume an active mode when the activation signal is in a first state, and to assume an idle mode when the activation signal is in a second state. The apparatus generally includes level detection means, operatively connected with the first line, for generating a level detection signal when a specified parameter of the input signal is outside a first predetermined parametric range by at least a first predetermined amount and outside a second predetermined parametric range by at least a second predetermined amount. The apparatus also includes activating means, operatively connected with the logic device and the level detection means, for receiving the level detection signal and for transmitting to the logic device the activation signal in response to the level detection signal. According to another aspect of the present invention, an apparatus for activating a dual-mode logic device in response to a specified parameter of an input signal is provided. The logic device receives the input signal over an input line. The apparatus includes a logical HIGH sensing circuit, a logical LOW sensing circuit, and an out-of-ranges detect circuit. The logical HIGH sensing circuit is operatively connected with the input line and generates a first signal when the specified parameter is within a logical HIGH range. The logical LOW sensing circuit is also operatively connected with the input line and generates a second signal when the specified parameter is within a logical LOW range. The out-of-ranges detect circuit is operatively connected with the logical HIGH sensing circuit, the logical LOW sensing circuit, and the logic device. The out-of-ranges detect circuit receives the first signal and the second signal, and activates the logic device when the specified parameter in not within the logical HIGH range and not within the logical LOW range
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