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Home I/O Systems Memory-access-control-circuit-with-automatic-access-mode-determination-circuitry-with-read-modify-write-and-write-per-bit-operations

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Details
Inventors: Ohuchi, Mitsurou;
Assignee: NEC Corporation (Tokyo, JP)
Primary Examiner: Dixon; Joseph L.
Assistant Examiner: Kim; Matthew M.
Attorney, Agent or Firm: Foley & Lardner

A memory access control circuit determines an optimum memory access mode and performs the optimum memory access mode without requiring additional data from the data processing unit. The circuit performs a plurality of memory access operations, the number of which is larger than the number of access modes designated by the data processing unit, and decides automatically which memory access is to be performed, and independently executes the appropriate memory access. The memory access control circuit provides memory access control functions which make it particularly suited for use in a graphics display system.

DETAILED DESCRIPTION Therefore, an object of the present invention is to provide a memory access control circuit which determines an optimum memory access mode and performs the determined memory access mode without requiring various memory access mode designation data from a data processing unit.
Another object of the present invention is to provide a graphic controller having an improved memory access control circuit and which performs the appropriate memory access for a particular drawing operation in accordance with the type of memory employed in a system.
Still another object of the present invention is to provide a memory access control circuit which can perform a plurality of memory access operations, the number of which is larger than the number of access modes designated by a drawing control unit, and which judges automatically which memory access is to be performed and executes the judged memory access.
A memory access control circuit according to the present invention includes an "access mode determining information generator" receiving an access request from a data processing unit and generating information for determining an access mode to be performed by judging the access information of the access request.
The memory access control circuit further includes an access sequence control circuit having a function of performing memory access operations in accordance with not only an access mode designated by the access information of the access request but also other access modes.
The access sequences control circuit selects one of the access modes in response to the access mode determining information from the information generator to perform the memory access operation in accordance with the selected access mode.
Thus, the access sequence control circuit independently manages a plurality of access modes and performs a memory access operation by selecting the approximate access mode.
The data processing unit such as a drawing control unit is thereby free from the management of all the access modes



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