Method and apparatus for dynamically testing electrical interconnect

DETAILED DESCRIPTION A new type of hardware emulation system is disclosed and claimed which reduces hardware cost by time-multiplexing multiple design signals onto physical logic chip pins and printed circuit board traces but which does not have the limitations of low operating speed and poor asynchronous performance.
Additional methods to multiplex multiple signals onto a single physical interconnection which are suitable for hardware emulation but do not have the disadvantages of high power and complex system design are also disclosed.
In the preferred embodiment, time-multiplexing is performed on clock qualifier paths (a clock qualifier is any signal which is used to gate a clock signal) and data paths in a design but not on clock paths (a clock path is the path between the clock signal and the clock source from which the clock signal is derived).
The reconfigurable logic system of the present invention comprises a plurality of reprogrammable logic devices, each having internal circuitry which can be reprogrammably configured to provide at least combinatorial logic elements and storage elements.
The programmable logic devices also have programmable input/output terminals which can be reprogrammably interconnected to selected ones of functional elements of the logic devices.
The reprogrammable logic devices have input demultiplexers and output multiplexers implemented at each input/output terminal.
The input demultiplexers receive a time-multiplexed signal and divide it into one or more internal signals.
The output multiplexers combine one or more internal signals onto a single physical interconnection.
The invention also comprises a plurality of reprogrammable interconnect devices, each of which have input/output terminals and internal circuitry which can be reprogrammably configured to provide interconnections between selected input/output terminals.
The reprogrammable interconnect devices also have input demultiplexers and output multiplexers implemented at each input/output terminal