Method and apparatus for encoding binary data

DETAILED DESCRIPTION An object of the present invention is to provide a method and an apparatus for encoding binary data using a method for encoding binary data which has the features of being DC free and a large minimum distance between encoded signal transitions and does not require a complicated decoding circuit.
In order to achieve this object, the apparatus for encoding binary data according to the present invention comprises: a converting means for separating input binary data into data words each containing N data bits (wherein N is an integer larger than (1) and converting each of the data words to a channel word containing M data bits (wherein M is an integer large than (N); and an encoding means for producing NRZI code data from said channel word.
The converting means does not convert a data word when the data word has a specific data bit pattern or when the data word is in a specific relationship to adjacent data words.
This unconverted data word is converted to an established channel word which is so determined to reduce the DSV at a time when a predetermined number of data words which are convertible in real time have been inputted or when another data word which should be maintained unconverted has been inputted again.
Further, the converting means outputs a channel word after at least a delay time which is required to convert the unconverted data word to the established channel word.
The conversion may preferably be performed according to the following rules: (i) two or more `0` bits exist between two `1` bits in the channel word if the channel word contain two or more `1` bits; (ii) a most significant bit or least significant bit of each channel word is made normally `0` as a merging bit, and when bits adjacent to said merging bit at both sides thereof are both `1`, the adjacent bits are both made `0` and the merging bit is made `1`; and (iii) the merging bit is made `0` or `1` so that the absolute value of the DSV is reduced when a bit which is three bits before the merging bit is `1` and the merging bit is followed by two continuous `0` bits or when two continuous bits just before the merging bit are both `0` and a bit three bits after the merging bit is `1`