 Computer system having a structure for easy assembling/disassembling of peripheral equipment |
| Accordingly, it is an object of the present invention to provide an improved portable computer. It ... |
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| Media eject mechanism |
| It has been discovered that a media eject mechanism which includes an L shaped eject member having ... |
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| Media module locking and ejecting mechanism |
| In accordance with the present invention, an apparatus for locking and ejecting a media module in a ... |
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| Device for mounting fan in a portable computer |
| Accordingly, it is an object of the present invention to provide an improved device for mounting a ... |
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| Personal digital assistant and associated computer host device bay structure |
| In carrying out principles of the present invention, in accordance with a preferred embodiment ... |
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| Portable computer having latching hooks |
| In one embodiment, as shown in FIG. 1, computer system 10 includes a microprocessor 12, which is ... |
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| Data set network diagnostic system |
| FIG. 1 depicts a communication system, or network, in which the present invention is used. In ... |
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| Recording medium of flat surface with resin filled ring grove |
| Accordingly, a general object of the present invention is to provide a disc and a manufacturing ... |
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| Analog subscriber carrier system repeater with automatic gain and slope correction |
| OF THE INVENTION Referring now to FIG. 1 a subscriber carrier terminal at central office 2 is ... |
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| Plasma panel display selectively updatable on pel line basis |
| The system arrangement shown in FIG. 1 includes a processor 10 which may, typically, include a ... |
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Method and apparatus for qualifying data
| Details |
Inventors: Bucska, Nicholas J.; Hopper, James F.;
Assignee: Amcodyne Incorporated (Longmont, CO)
Primary Examiner: Cardillo; Raymond F.
Assistant Examiner: Bowler; Alyssa H.
Attorney, Agent or Firm: Sheridan, Ross & McIntosh
An apparatus is provided for removing invalid read signal peaks which are detected during a disk read operation. In one embodiment, the apparatus converts the analog read-back signal from the disk into a pair of signals, a raw data signal being indicative of the signal peaks read from the disk and a raw polarity signal being indicative of the polarity of such peaks. The raw data signal is inputted to a phase lock loop, which outputs a strobe signal. The raw data signal and the raw polarity signal are made synchronous with the strobe signal in a reclocking circuit. The data and polarity signals outputted by the reclocking circuit are synchronously applied to a qualifying circuit, the output therefrom being free of invalid data. |
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DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS Referring to FIGS.
1-4, the hardware components of an embodiment of the present invention are illustrated and the following discussion is directed thereto.
In FIG.
1, an Analog Readback or Read signal is shown being inputted to a signal converter 10.
The Analog Readback signal is generated by a head or transducer which reads information previously written or stored on a magnetic disk.
Signal converter 10 is illustrated in more detail in FIG.
2.
The Analog Readback signal is applied to a number of parallel signal paths in the signal converter 10.
The signal is inputted to a positive peak detector 12, a positive threshold comparator 14, a differentiator 16, a negative peak detector 18, and a negative threshold comparator 20.
The positive peak detector 12 outputs a positive level signal or logic HIGH when the analog input applied thereto is of a positive magnitude or begins to exceed zero volts.
In one embodiment, the positive peak detector 12 includes a sample and hold circuit, comprising a transistor and a capacitor connected to the emitter of the transistor.
The capacitor charges very rapidly to the magnitude of any positive analog voltage signal applied to the base of the transistor.
The output of the positive peak detector 12 is sent to the clock input of a D-type flip-flop 22, the D-input is continuously provided with a logic HIGH.
The positive threshold comparator 14 compares the Analog Readback signal with a predetermined positive threshold level.
The predetermined level is some fraction or percentage of expected read signal peaks, which are indicative of data information read from the disk.
Typically, the threshold level is in the range of 30-50% of the expected peak value.
The positive threshold comparator 14 outputs a logic HIGH when the magnitude of the inputted Analog Readback signal is greater than the positive threshold level inputted thereto.
Conversely, when the Analog Readback signal is less than the positive threshold level, a logic LOW is outputted by the positive threshold comparator 14
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I/O Systems 
