Method for manufacturing a custom-circuit LSI, and a gate array device

DETAILED DESCRIPTION The object of the present invention is to provide a method for manufacturing a large-scale custom-circuit LSI, whose metal pattern can be designed with a CAD system in a short time, thus reducing labor, and to provide a gate array deivce which is used as the base component of such a custom-circuit LSI.
According to the invention, there is provided a method comprising a first step of preparing a gate array device comprising a number of logic cells; a second step of dividing the logic cells formed of the gate array device into a plurality of groups each including a predetermined number of logic cells; a third step of interconnecting the logic cells of each group, thus forming at least one logic circuit; and a fourth step of interconnecting the logic cells of the groups.
Further, according to the present invention there is provided a gate array device comprising a semiconductor chip; a plurality of groups of logic cells formed on the semiconductor chip, the logic cells of each group being adapted to be interconnected to form at least one logic circuit; a plurality of buffer circuits formed on the semiconductor chip for reducing the delay of signal transfer between logic circuits to be formed by interconnecting the logic cells and to be connected to one another to form a custom-circuit; and bonding pads formed on the semiconductor chip for receiving input and output signals of the custom-circuit.