Reducing memory access in a multi-cache multiprocessing environment with each cache mapped into different areas of main memory to avoid contention

DETAILED DESCRIPTION This invention discloses a method for screening the memory accesses and thereby freeing the cache to service their processor in multiple caches and a circuit which implements this method.
Additional circuitry for performing burst-mode operations is further disclosed.
Contention is eliminated by mapping the individual caches into different areas of the physical address space of main memory.
Circuitry in the individual cache memory implements the mapping function by permitting a range of addresses to be selected by the CPU, and then responding with the cache function only when an address within this range is placed on the main memory address bus.
Contention problems during burst-mode operations are avoided by circuitry in the cache which automatically steps through the memory addresses specified by the operation and decides whether these addresses correspond to the area mapped by the cache.