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Home I/O Systems Reversible-computer-apparatus-and-methods-of-constructing-and-utilizing-same

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Details
Inventors: Cezzar, Ruknet;
Assignee:
Primary Examiner: Lall; Parshotam S.
Assistant Examiner: Vu; Viet
Attorney, Agent or Firm: Larson and Taylor

A computer apparatus having a unique architecture which is capable of both forward and reverse execution modes. The reverse execution mode is implemented at the machine language level, and relies on an internal stack in micromemory or the microprocessor's stack pointer register for data saving purposes. A unique instruction set design is employed which includes a plurality of forward execution instructions and complementary reverse execution instructions of opposite sense. During the reverse execution mode, the reverse execution instructions are implemented in a logical flow which is substantially the reverse of that used during the forward execution mode.

DETAILED DESCRIPTION The invention provides a reversible computer apparatus capable of executing instructions in both a forward execution mode and a reverse execution mode, and includes a microprocessor means having a plurality of registers, program memory and data memory.
The program memory is programmed at the machine language level to incorporate an instruction set comprising a plurality of forward execution instructions and complementary reverse execution instructions, the reverse execution instructions being of opposite sense relative to the forward execution instructions.
Stack means are provided for saving data values which are overwritten during forward execution decoding, whereby the saved overwritten values may be restored as necessary during reverse decoding.
The program memory is further programmed such that the apparatus is selectively operable in a forward execution mode which implements the forward execution instructions in a forward logical flow, and a reverse execution mode which implements the reverse execution instructions in a reverse logical flow which is substantially the opposite of the forward logical flow.
In a preferred embodiment of the invention, the program memory includes micromemory which is programmed to define an internal stack which may be selectively enabled to automatically save data before destructive operations during the forward execution mode, whereby the saved data may be restored during the reverse execution mode.
The internal stack in micromemory is enabled and disabled via a flag of the processor status register of the microprocessor, so as to selectively automatically save data before destructive operations, while the stack pointer register of the microprocessor is implemented as a simulated stack when the internal stack in micromemory is disabled.
The above and further objects, details and advantages of the invention will become apparent from the following detailed description, when read in conjunction with the accompanying drawings.



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