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Scalable tree structured high speed input/output subsystem architecture
| Details |
Inventors: Wooten, David R.; Miller, Craig A.; Leigh, Kevin B.; Costley, Robert Brett; Simonich, Christopher E.;
Assignee: Compaq Computer Corporation (Houston, TX)
Primary Examiner: Treat; William M.
Assistant Examiner: Coulter; Kenneth R.
Attorney, Agent or Firm: Pravel, Hewitt, Kimball & Krieger
A point to point connection architecture for a computer I/O subsystem, resulting in a scalable tree structure. A Master I/O Concentrator (MIOC) is connected to the host bus and handles conversion between a bus oriented structure and the tree structure of the I/O subsystem. Ports away from the host bus are downstream ports and conform to a simple byte wide message protocol. Various IOCs and devices can be attached to one of the downstream ports on the MIOC. The MIOC directs transmissions to the appropriate channel based on a geographical addressing scheme. The IOC connections act as further points of branching. Ultimately IOD or I/O devices are reached, having an upstream port for connection to the IOC and a downstream port and internal logic appropriate for the particular peripheral device. Various registers are present in the IOCs and the IODs to allow determination of the topology and particular devices present. Messages and commands are transferred in the I/O subsystem in defined packets. Various read, write and exchange commands are used, with a read response being utilized to allow split transaction read operations. Certain status and control commands are also present. Interrupts are handled by having the interrupt levels correspond to memory addresses of the programmable interrupt controller, thus allowing simple selection of interrupts to be generated by the devices and no need for separate wiring. |
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DETAILED DESCRIPTION A system according to the present allows a computer to utilize existing applications software, but allows for a great improvement in I/O capabilities at a lower cost then present solutions. The basis for the system is a point to point connection for the I/O subsystem, resulting in a tree structure, allowing parallel I/O operations separate from processor operations and separation of I/O devices with varying bandwidths. By reducing the loadings on the transmission lines, very high data rates can be achieved with MOS logic. A Master I/O Concentrator (MIOC) is connected to the conventional, high performance host bus and handles conversion between a bus oriented structure and the tree structure of the I/O subsystem. Ports away from the host bus are downstream ports and conform to a simple byte wide transmission protocol to further allow high speed transfer. Various IOCs and devices can be attached to one of the downstream ports on the MIOC. The MIOC directs transmissions to the appropriate channel based on a global addressing space. The IOC connections act as further points of branching. Ultimately IOD or I/O devices are reached, having an upstream port according to the protocol of the present invention and a downstream port and internal logic appropriate for the particular peripheral device of interest. Various registers are present in the IOCs and the IODs to allow determine of the topology and particular devices present. Messages and commands are transferred in the I/O subsystem in defined packets. Various read, write and exchange commands are used, with a read response being utilized to allow split transaction read operations. Certain status and control commands are also present. Interrupts are handled by having the interrupt levels correspond to memory addresses of the programmable interrupt controller, thus allowing simple selection of interrupts to be generated by the devices and no need for separate wiring. Thus a high performance, expandable, yet low cost, I/O subsystem architecture is provided according to the present invention
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