Semiconductor memory device capable of relieving defective bits

DETAILED DESCRIPTION Accordingly, an object of this invention is to provide a semiconductor memory device in which the leak current occurring in defective bits can be interrupted even if it occurs in the leak current path created by the well region, and the defective bits can be relieved by replacing the defective bits by spare bits.
The above object can be attained by a semiconductor memory device comprising a semiconductor substrate of a first conductivity type; a plurality of well regions of a second conductivity type which are independently formed in the semiconductor substrate; a memory cell array having a plurality of memory cells each formed of MOS transistors of the first conductivity type and MOS transistors of the second conductivity type and arranged in an array form, the first conductivity type MOS transistors in each row being formed in one of the plurality of well regions and the second conductivity type MOS transistors being formed in the semiconductor substrate a plurality of common source wirings respectively connected to the well regions and each connected commonly to the sources of those of the MOS transistors which are formed in a corresponding one of the independently formed well regions; and an isolation circuit connected between the common source wirings and a power source, for isolating the well region in which a row including a defective memory cell is formed from the power source, or a switching circuit for selectively supplying one of a power source potential and a potential of the semiconductor substrate to the common source wirings.
A potential different from that of the semiconductor substrate is applied to the common source wirings ( and thereby to the well regions) on the row including no defective memory cell via the isolation circuit or switching circuit so as to operate the memory cells on the row in a normal operation mode.
In contrast, in the row in which at least one defective memory cell is formed and a leak current occurs, the common source wirings are isolated from the power source by means of the isolation circuit or applied with the same potential as that of the semiconductor substrate by means of the switching circuit