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 Signal-processing multiprocessor system

Details
Inventors: Demeure, Alain;
Assignee: Thomson-CSF (Paris, FR)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:

A multiprocessor digital computation system for performing at least one signal-processing chain which includes a number of processes. Each process is executed by means of executing circuits including memories, computing operators and input-output couplers, which are interconnected by means of a bus system. The system includes a sequencer and an address and connection generator, wherein the sequencer includes plural process modules, one for each process to be executed, and indicates at each computing step the state of occupation or non-occupation of the executing circuits and allocates the executing circuits to execute a process to be executed upon availability of the resources necessary for execution of the process.

DETAILED DESCRIPTION It is an object of the present invention to provide a signal-processing system which makes it possible to comply with these different requirements of speed and simplicity, especially by adopting a single-bus multiprocessor system and decentralization of the arbitration function.
To this end, the system according to the invention includes circuits for continuously indicating the state of occupation of the resources which circuits are consulted independently by each process and permit or prohibit the performance of the consultant process as a function of the resources available at the instant of consultation.
According to the invention, there is provided a multiprocessor system for processing signals by means of a finite number of processes including: circuits for executing the processes, including memories, computing operators and input-output couplers, which executing circuits can be at least partly utilized in alternate sequence by a plurality of processes; a bus for transferring computing information between the executing circuits; a controller for controlling the execution of the processes; wherein the controller includes a sequencer connected to an address and connection generator, the sequencer being constituted by a finite number of identical modules assigned to the processes in one-to-one correspondence, each module being constituted by memories and logic circuits which, in conjunction with a second bus common to all the modules, ensure time management of the assignment of the executing circuits to each process.



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