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 "Simple code" encoder/decoder

Details
Inventors: LaBarge, Steven B.; Waggoner, Bruce;
Assignee: The Grass Valley Group, Inc. (Nevada City, CA)
Primary Examiner: Shoop, Jr.; William M.
Assistant Examiner: Hoff; Marc S.
Attorney, Agent or Firm: Gray; Francis I.

A Simple Code encoder/decoder converts a ternary, or bipolar, signal having a strong clock component into a binary signal while maintaining the strong clock component for processing with digital equipment. The Simple Code is high for each positive value of the bipolar signal, low for each negative value of the bipolar signal, and alternates high/low for each zero value of the bipolar signal. The encoder uses an extractor circuit to generate a +PULSE signal, a -PULSE signal and a CLOCK signal from the bipolar signal. The +PULSE and CLOCK signals are combined to produce an intermediate binary signal, and the intermediate binary signal is combined with the -PULSE signal to produce the Simple Code binary signal. The decoder extracts the CLOCK signal from the Simple Code binary signal and uses the CLOCK signal to generate positive and negative pulse signals corresponding to the highs and lows of the binary signal of a duration equal to the period of the CLOCK signal. The positive and negative pulse signals are combined to produce the original bipolar signal.

DETAILED DESCRIPTION WHAT IS CLAIMED IS: 1.
A method for converting a ternary signal on a signal input line into a binary signal comprising the steps of: generating a high value for the binary signal when the value of the ternary signal is positive; generating a low value for the binary signal when the value of the ternary signal is negative; and generating an alternating high/low signal for the binary signal when the value of the ternary signal is zero.
2.
A method for converting a ternary signal having a strong clock component into a binary signal comprising the steps of: extracting from the ternary signal a clock signal, a positive pulse signal corresponding to the positive values of the ternary signal, and a negative pulse signal corresponding to the negative values of the ternary signal; combining the positive pulse signal with the clock signal to produce an intermediate binary signal; and combining the intermediate binary signal with the negative pulse signal to produce the binary signal such that the binary signal has a high value for each positive value of the ternary signal, a low value for each negative value of the ternary signal, and an alternating high/low value for each zero value of the ternary signal.
3.
An apparatus for converting a ternary signal having a strong clock component into a binary signal comprising: means for extracting from the ternary signal a clock signal, a positive pulse signal corresponding to the positive values of the ternary signal, and a negative pulse signal corresponding to the negative values of the ternary signal; means for combining the positive pulse signal with the clock signal to produce an intermediate binary signal; and means for combining the negative pulse signal with the intermediate binary signal to produce the binary signal such that the binary signal has a high value for each positive value of the ternary signal, a low value for each negative value of the ternary signal, and an alternating high/low value for each zero value of the ternary signal


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