Single-chip mircocomputer with clock-signal switching function which can disable a high-speed oscillator to reduce power consumption

DETAILED DESCRIPTION It is, therefore, an object of the present invention to overcome the problem existing in the conventional arrangement and to provide an improved single-chip microcomputer.
It is another object of the present invention to provide a single-chip microcomputer which is capable of effecting an automatic stop of a main system-clock oscillation circuit after a main clock-signal has been switched to a sub clock-signal.
In carrying out the above and other objects of the present invention in one form, there is provided a single-chip microcomputer provided with a clock-signal generating circuit having: a main system-clock oscillation circuit and a sub system-clock oscillation circuit; a selector for outputting a clock-signal by making a selection between a main clock-signal which is an output of the main system-clock oscillation circuit and a sub clock-signal which is an output of the sub system-clock oscillation circuit; a selector flag setter for setting a selector flag signal to designate the selection to be made by the selector; an oscillation control flag setter for setting an oscillation control flag signal to control the oscillating operation of the main system-clock oscillation circuit; a synchronization control circuit for making the synchronization between the main clock-signal and the sub clock-signal and outputting a synchronization signal; and a means for taking a logical AND operation of the oscillation control flag signal from the oscillation control flag setter, the selector flag signal from the selector flag setter and the synchronization signal from the synchronization control circuit and outputting an oscillation control signal for stopping the oscillating operation of the main system-clock oscillation circuit.
In the single-chip microcomputer according to the present invention, when the main system-clock oscillation circuit is to be stopped after the clock-signal has been switched to the sub clock-signal from the main clock-signal, it is possible for the main system-clock oscillation circuit to stop automatically after the completion of the switching from the main to sub clock-signal