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Home I/O Systems Successive-approximation-S-D-converter-with-inherent-quantization-error-centering

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 Successive approximation S/D converter with inherent quantization error centering

Details
Inventors: Simon, David J.; Costello, Edward C.;
Assignee: The Singer Company (Little Falls, NJ)
Primary Examiner: Miller; Charles D.
Assistant Examiner:
Attorney, Agent or Firm: Altmiller; John C., Kennedy; Thomas W.

A comparator network in a successive approximation synchro-to-digital converter uses two comparators to determine the quadrant of the synchro angle and then uses one of these comparators as a steering voltage comparator to determine the less significant bits of the synchro angle. Fractions of the sine and cosine analog inputs are cross-coupled to the comparators to provide inherent quantization error centering.

DETAILED DESCRIPTION It is the object of the present invention to provide a synchro to digital successive approximation converter whose inherent quantization error centering is independent of both DC voltage and line-to-line synchro voltage variations.
The present invention accomplishes this by the generation of a unique modification to the nonlinear approximations such that both the circuit complexity and maximum intrinsic error remain similar to those of prior art devices.
In a ten bit converter, information is generated with a maximum error of 10 arc minutes at a conversion time of 150 micro seconds maximum.
The information is generated in two segments.
A quadrant selection circuit determines the two most significant bits by standard decoding of the sine and cosine voltage polarities.
Also incorporated in this circuitry is a one-half least significant bit offset implemented using well-known trigonometric identities and approximations.
The example given is for a ten bit converter.
Naturally, the invention is equally applicable to converters having greater or lesser resolution.
Half of the least significant bit of a ten bit analog-to-digital angle converter represents 0.
176 degrees.
Thus, the following identities apply: ##EQU2## Similarly cos (.
theta.
+0.
176.
degree.
).
perspectiveto.
cos (.
theta.
)-0.
003 SIN (.
theta.
).
Therefore, in accordance with the present invention implementation of the offset is accomplished by cross-coupling 0.
003 of the sine and cosine functions with appropriate polarity.
In general, for an n-bit converter 1/2 LSB represents 360.
degree.
(2.
sup.
-(n+1)) and the cross-coupling ratio is sin [360.
degree.
(2.
sup.
-(n+1) ].
This cross-coupling ratio necessary to achieve a 1/2 LSB offset will be referred to as the "1/2 LSB ratio" throughout this disclosure.
Further, one of the quadrant comparators is utilized as the steering voltage comparator.
The remainder of the bits are determined in conventional fashion by successive approximation utilizing the steering voltage comparator



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