Home | Links | Contact Us | More About Intellectual Property | Bookmark
Search patents:
Home I/O Systems Switching-regulator-having-low-power-mode-responsive-to-load-power-consumption

 AC input cell for data acquisition circuits
What is claimed is: 1. An AC input cell, comprising: a first node; a second node; a first line ...


 Signal-processing multiprocessor system
It is an object of the present invention to provide a signal-processing system which makes it ...


 Microcoded microprocessor with shared ram
The present invention is a system for utilizing a single RAM array as a control store for microcode,...


 Buffer memory device capable of memorizing operand and instruction data blocks at different block sizes
What is claimed is: 1. In a buffer memory device intermediate between a central processing unit and ...


 Data transfer control unit permitting data access to memory prior to completion of data transfer
What is claimed is: 1. A data transfer control unit comprising: (a) first address register means ...


 Voltage comparator
An object of the invention is to provide a voltage comparator, which can operate efficiently with a ...


 Logarithmic transformation circuitry for use in semiconductor integrated circuit devices
It is therefore an object of the present invention to provide a new and improved logarithmic ...


 Low-voltage CMOS comparator
In general, the invention features a CMOS comparator which includes a capacitor connected in an ...


 Compact comparator
FIG. 1 shows a first embodiment of the invention. The comparator circuit 100 has first and second ...


 Synchronizing circuit for receiving an asynchronous input signal
It is an object of the present invention to provide a synchronizing circuit capable of reducing the ...


 Switching regulator having low power mode responsive to load power consumption

Details
Inventors: Hwang, Jeffrey H.;
Assignee: Micro Linear Corporation (San Jose, CA)
Primary Examiner: Sterrett; Jeffrey L.
Assistant Examiner:
Attorney, Agent or Firm: Haverstock & Owens LLP

A switching mode power converter monitors the level of power supplied to a load device. The operation of a switch is controlled and used to draw power from an input source and supply power to the load device. During normal operation, the operation of the switch is triggered on every clock pulse by a triggering pulse. The duty cycle of the triggering pulse is controlled by a pulse width modulation circuit which monitors the level of power being supplied to the load device. When the power being supplied to the load falls to a predetermined light load threshold level, representing that the load device is either in a standby mode or a period of light use, the switching mode power converter will reduce the amount of power being drawn from the input source by disabling the triggering pulse for an appropriate number of pulses of the clock signal. The number of pulses skipped will depend on an amount of power being supplied to the load device and an amount of voltage stored across the capacitor. The triggering pulse is re-enabled once the power being supplied to the load device rises above the light load threshold level or the voltage stored across the capacitor falls to a low threshold level. In this manner, during periods when the load device is not operating in the continuous conduction mode, the switching mode power converter will attempt to minimize the amount of power being drawn from the input source.

DETAILED DESCRIPTION A switching mode power converter monitors the level of power supplied to a load device.
The operation of a switch is controlled and used to draw power from an input source and supply power to the load device.
During normal operation, the operation of the switch is triggered on every clock pulse by a triggering pulse.
The duty cycle of the triggering pulse is controlled by a pulse width modulation circuit which monitors the level of power being supplied to the load device.
When the power being supplied to the load falls to a predetermined light load threshold level, representing that the load device is either in a standby mode or a period of light use, the switching mode power converter will reduce the amount of power being drawn from the input source by disabling the triggering pulse for an appropriate number of pulses of the clock signal.
The number of pulses skipped will depend on an amount of power being supplied to the load device and an amount of voltage stored across the capacitor.
The triggering pulse is re-enabled once the power being supplied to the load device rises above the light load threshold level or the voltage stored across the capacitor falls to a low threshold level.
In this manner, during periods when the load device is not operating in the continuous conduction mode, the switching mode power converter will attempt to minimize the amount of power being drawn from the input source.



Related patents
  Method for DRAM sensing current control
OF THE PREFERRED EMBODIMENTS OF THE INVENTION Turning first to FIG. 1, a portion of a prior art bit line and sense amplifier circuit is shown. Bit storage capacitors 1A ...
  Sense amplifier power supply circuit
OF PREFERRED EMBODIMENT For the convenience of description, a sense amplifier power supply circuit of FIG. 3 will be regarded as being formed on first and second memory ...
  Current monitors with independently adjustable dual level current thresholds
Current sensing circuits having independently adjustable dual-level trip thresholds for use in hot swap controllers, solid state circuit breakers and other current ...
  Hysteresis comparator circuit consuming a small current
It is a general object of the present invention to provide an improved and useful hysteresis comparator circuit in which the above-mentioned problems are eliminated. A ...
  Differential amplifier
What is claimed is: 1. A differential amplifier comprising at least: a first amplifier transistor whose base terminal is coupled to an emitter terminal of a first ...
  Hazard-free clocked master/slave flip-flop
The present invention provides a clocked master/slave flip-flop comprising a master portion having plural similar logic elements for receiving at least data and clock ...
  Carrier detect circuit
An object of the invention is to provide an improved carrier detect circuit of the type described in U.S. Pat. No. 3,593,151 for preventing false startups of printing ...
  Processor supervisory circuit and method having increased range of power-on reset signal stability
To address the above-discussed deficiencies of the prior art, the present invention provides a novel, low-cost, discrete-component processor supervisory circuit. More ...
  Low-noise frequency divider
It is an object of the invention to remedy these drawbacks to a great extent by proposing a frequency divider which generates a single parasitic signal having a unique ...
  DC-to-DC converter functioning in a pulse-skipping mode with low power consumption and PWM inhibit
OF THE PREFERRED EMBODIMENTS The numerous innovative teachings of the present application will be described with particular reference to the presently preferred ...

0.004

Archive: All patents - Links

Copyright (c)2006 Eipa-patents.org - All rights reserved