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| Optical transmitting and/or receiving module |
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| Fiber optic connector assembly |
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Synchronizer circuit which controls switching of clocks based upon synchronicity, asynchronicity, or change in frequency
| Details |
Inventors: Miller, Robert J.;
Assignee: NCR Corporation (Dayton, OH)
Primary Examiner: Butler; Dennis M.
Assistant Examiner:
Attorney, Agent or Firm: Martin; Paul W.
A synchronizer circuit which bypasses synchronous clock signals or maintains synchronicity of synchronous clock signals without degrading system performance. The synchronizer circuit includes a synchronizer having first and second clock signal inputs. A switching circuit couples to the first clock signal and to the output of the synchronizer. The synchronizer circuit is preferably programmable, and includes a control circuit which determines whether the first and second frequencies are synchronous or asynchronous, which causes the switching circuit to select the synchronizer output when the first and second frequencies are asynchronous, and which causes the switching circuit to select the first clock signal when the first and second frequencies are synchronous. The switching circuit may also couple to a first stage output of the synchronizer, and the control circuit may cause the switching circuit to select the first stage output when the first and second frequencies are synchronous and either of the first and second frequencies is a multiple of the other. The switching circuit may also include logic elements for decoupling the first and second clock signals from a multi-frequency device when the first and second frequencies are changing. |
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DETAILED DESCRIPTION In accordance with the teachings of the present invention, a synchronizer circuit is provided.
The synchronizer circuit includes a synchronizer having first and second clock signal inputs.
A switching circuit couples to the first clock signal and to the output of the synchronizer.
The synchronizer circuit is preferably programmable, and includes a control circuit which determines whether the first and second frequencies are synchronous or asynchronous, which causes the switching circuit to select the synchronizer output when the first and second frequencies are asynchronous, and which causes the switching circuit to select the first clock signal when the first and second frequencies are synchronous.
The switching circuit may also couple to a first stage output of the synchronizer, and the control circuit may cause the switching circuit to select the first stage output when the first and second frequencies are synchronous and either of the first and second frequencies is a multiple of the other.
The switching circuit may also include logic elements for decoupling the first and second clock signals from a multi-frequency device when the first and second frequencies are changing.
It is accordingly an object of the present invention to provide a synchronizer circuit.
It is another object of the present invention to provide a synchronizer circuit which bypasses synchronized signals, or maintains synchronization of synchronized signals without a degradation of performance.
It is another object of the present invention to provide a synchronizer circuit which detects frequency changes and decouples first and second clock signals from a multi-frequency device.
It is another object of the present invention to provide a synchronizer circuit which is programmable.
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I/O Systems 
