Synchronous semiconductor device with discontinued functions at power down

DETAILED DESCRIPTION Accordingly, a general object of the present invention is to provide a novel and useful synchronous semiconductor device in which the disadvantages of the aforementioned prior art are eliminated.
A more specific object of the present invention is to provide a synchronous semiconductor device, such as the SDRAM, in which the limitation for entry of the PD command and the CSUS command is eliminated so that the manner of using the device can be improved.
The above objects of the present invention are achieved by a synchronous semiconductor device operating in synchronism with a clock signal supplied from an external unit, the synchronous semiconductor device capable of being set in a power down mode, the power down mode being a mode in which operations of predetermined circuits are inactivated, the synchronous semiconductor device comprising: first signal generating means for generating a first internal signal having a first state and a second state which permits the synchronous semiconductor device to be in a state where data is not output; second signal generating means for generating a second internal signal, a change of the second internal signal from a first state to a second state being delayed for a delay time from a change of the first internal signal from the first state to the second state; and timing control means for activating the power down mode in synchronism with the clock signal when the second internal signal is in the second state, so that the synchronous semiconductor device is in the power down mode.
According to the present invention, the second internal signal is changed from the first state to the second state after the delay time elapses from a time at which the first internal signal is changed from the first state to the second state.
Thus, when the synchronous semiconductor device is permitted to be in the state where the data is not output, the power down mode is activated.
That is, the power down mode is not activated when the synchronous semiconductor device is in a state where the data is output