System for controlling a serial data channel with a microprocessor

DETAILED DESCRIPTION Having thus described our invention, what we claim as new, and desire to secure by Letters Patent is: 1.
A system for controlling the bidirectional transfer of data through a serial data channel connected between a first parallel by bit interface and a second serial by bit interface, said system comprising: a serial data channel including a first means for converting a parallel by bit input signal to a serial by bit output signal for said second interface and a serial by bit input signal from said second interface to a parallel by bit output signal, and a register for storing each said parallel by bit signal; a microprocessor having a parallel by bit input port and a parallel by bit output port, each of which includes a plurality of instruction addressable units for transferring a byte of data to or from the processor; means for selectively connecting said parallel by bit interface to the input of said register or one of said input port units; means selectively connecting the output of said register to another said input port unit or to said first interface; and control means including said microprocessor and clock circuits connected to said serial channel to cause a byte of data presented to said first interface to be transferred to either said microprocessor in parallel by bit form or to said second interface in serial by bit form through said register, or a byte of data presented to said second interface in serial by bit form to be transferred to said microprocessor or said first interface in parallel by bit form through said register.
2.
The system recited in claim 1 in which said means for connecting said parallel by bit interface to the input of said register includes one of said units of said input port having its input connected to said parallel by bit interface and its output connected to said register.
3.
The system recited in claim 1 in which said means for selectively connecting the output of said register to said first interface includes one of said units of the output port having its input connected to the output of said register and its output connected to said first interface