Variable sized FIFO memory and programmable trigger level therefor for use in a UART or the like

DETAILED DESCRIPTION In accordance with the illustrated embodiments, the present invention provides a data available interrupt circuit with a variable threshold for reading data from a receiver FIFO, and a variable depth FIFO where the depth of the FIFO is selectable for use as either the receiver or transmitter FIFO of a UART.
The data available interrupt circuit includes means for first determining if the data level in the receiver FIFO is at or exceeds a preselected threshold value.
The interrupt circuit also includes timing means to determine if the threshold has not been exceeded as the end of the data frame approaches and there has been no access of the receiver FIFO for a preselected period of time, then there is means to reduce the threshold by a preselected amount.
If the data available level is still less than the reduced threshold value, the threshold value is again reduced by a preselected value following each elapse of a second preselected pause between each resetting of the threshold level until either a data available interrupt occurs, the threshold level is dropped to zero, or the receiver FIFO is accessed.
Whenever the receiver FIFO is accessed, the threshold level is reset to the original preselected level.
If the data available interrupt is generated with the threshold level set at any level other than the original preselected level, the present invention also generates a .
delta.
trigger level flag.
The variable depth FIFO of the present invention includes memory means having a plurality of storage locations for storing data characters, and selection means for selecting the depth of the storage locations from fewer storage locations than the maximum number to the maximum number of the storage locations.