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Home I/O Systems Video-peripheral-board-in-expansion-slot-independently-exercising-as-bus-master-control-over-system-bus-in-order-to-relief-control-of-host-computer

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Details
Inventors: Cutter, Daniel F.;
Assignee: Data Translation, Inc. (Marlboro, MA)
Primary Examiner: Lim; Krisna
Assistant Examiner:
Attorney, Agent or Firm: Fish & Richardson

A video peripheral board for providing video I/O capabilities to a general purpose host computer. The video peripheral board comprises a video I/O port configured to connect a video device, a bus interface circuit, and a processor. The bus interface circuit is configured to connect the video peripheral board into a system bus of the host computer, and is capable of becoming bus master of the system bus. The bus interface circuit includes a bus master address generator, a data buffer and bus control logic that provides and receives bus control signals to and from the system bus to effect read and write operations over the system bus independent of the central processing unit of the host computer. The processor controls the bus interface circuit and the video I/O port to effect transfer of video data between the video I/O port and storage of the host computer, the video data passing through the video I/O port in real time.

DETAILED DESCRIPTION What is claimed is: 1.
A video peripheral board having connections for an expansion slot of a general purpose computer for providing video I/O capabilities to said general purpose host computer, said general purpose computer having a system bus, data storage accessed by read and write operations over said system bus, and a central processing unit, said system bus being controllable by said central processing unit (CPU) or by an external device connected to said system bus, the video peripheral board comprising: a video I/O port connected to a video device; a bus interface circuit connected to said system bus of the host computer and to said video I/O port, said bus interface circuit including a bus master address generator that generates addresses of said storage for read and write operations over said system bus, a data buffer storing video data for transfer to or from said system bus, and bus control logic that provides and receives bus control signals to and from said system bus to effect read and write operations over said system bus independent of said central processing unit of said general purpose host computer, said bus interface circuit thereby being bus master of said system bus; and a processor connected to control said video I/O port and said bus control logic of said bus interface circuit to effect transfer of video data between said video I/O port and said data buffer land transfer between said data buffer and said storage of the host computer at addresses generated by said bus master address generator, said video data passing through said video I/O port in real time wherein: the video peripheral board has two or more data paths through the video peripheral board to said bus interface circuit, each said data path having two ends and a priority, at least one said data path being connected between said bus interface circuit and said video I/O port; and said processor is configured to control said bus interface circuit and said data paths to effect real time transfers of data over said data paths, and to schedule completion of a transfer over a higher-priority one of said data paths in preference to a transfer over a lower-priority one of said data paths



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