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Details
Inventors: Hedley, David J.; David, Morgan W. A.;
Assignee: Sony Corporation (Tokyo, JP)
Primary Examiner: Groody; James J.
Assistant Examiner: Harvey; David E.
Attorney, Agent or Firm: Eslinger; Lewis H.

A video signal memory which may form a field memory in a special effects equipment of a high definition video system, provides storage of n.sup.2 m video data words and includes an array of n by n memory modules each capable of storing m video data words corresponding respectively to sample values at respective sample positions of a raster display, a first group of n buses for supplying data and address signals to the n columns respectively of the array, a second group of n buses for supplying data and address signals to the n rows respectively of the array, and means selectively to enable the first or second group of buses in each write cycle of the video signal memory and in the write cycle to supply over the enabled group of buses up to n data and address signals wherein the address designates the address in a memory module in the corresponding column or row of the array and the data is the data to be stored in the memory module.

DETAILED DESCRIPTION One object of the present invention is to provide a video signal memory in which data can be written at high speed.
Another object of the present invention is to provide a video signal memory in which data can be written at more than one location simultaneously.
Another object of the present invention is to provide a video signal memory in which data can be written over two groups of buses.
According to the present invention there is provided a video signal memory for storing n.
sup.
2 m video data words, comprising: an array of n by n memory modules each capable of storing m said video data words corresponding respectively to sample values at respective sample positions of a raster display; a first group of n buses for supplying data and address signals to the n columns respectively of said array; a second group of n buses for supplying data and address signals to the n rows respectively of said array; and means selectively to enable said first or said second group of buses in each write cycle of said video signal memory, and in said write cycle to supply over the enabled said group of buses up to n said data and address signals respectively, the address in each said data and address signal designating the address in a said memory module where said data is to be stored, and the data in the said data and address signal being the data to be stored at said address in said memory module.
The above, and other objects, features and advantages of this invention will be apparent from the following detailed description of illustrative embodiments which is to be read in connection with the accompanying drawings.



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