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Dynamic random access memory device having an improved timing arrangement
Accordingly, it is an object of the present invention to provide a D-RAM device with an input/output load connected to a pair of input/output lines, as in the device ...
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Biasing scheme for FIFO memories
Accordingly, it is a general object of the present invention to provide an improved biasing circuit for intermittent memories which is relatively simple and economical ...
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Air-deliverable, ice-penetrating sonobuoy
What is claimed is: 1. An air-deliverable sonobuoy comprising; a penetrator; an instrument housing having a maximum width greater than the maximum width of the ...
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Fiber optic alignment sleeve
The present invention may be said to have had the object of providing an alignment sleeve for use in fiber optic connectors which will simply, inexpensively and ...
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Connectors for optical fibers
What is claimed is: 1. A connector for joining coated optical fibres in end to end relationship, comprising; a tubular connecting member having a bore of a size to slide ...
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Circuitry for generating a sine wave and/or cosine wave from a pulse signal
The text of U.S. Pat. No. 3,938,394 is incorporated by reference at this point, specifically, column 3, line 20, through column 3, line 45....
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Single mode fiber-to-channel waveguide through-line coupler
The coupling procedure is carried out in the following manner. A capillary tube 10 is formed with a slotted end with the slots 11 and 12 perpendicular to each other. S...
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Remote control system
This invention is adapted to be embodied in a remote control system for transmitting control movement to a controlled member, such as a throttle or transmission control ...
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Electronic telephone set
OF THE PREFERRED EMBODIMENTS In FIG. 1 is shown the transmission circuit 1 connected to a telephone line. The transmission circuit 1 receives speech signals through a ...
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Audio signal reproduction apparatus with frequency response dependent upon error rates
FIG. 1 shows a basic circuit of an audio reproduction circuit having a linear interpolation stage 2 and an error correcting circuit 1 such as is known for example from S...
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