Enhanced network services using a subnetwork of communicating processors
The invention provides a method and system for providing enhanced services for a network, using a subnetwork of communicating processors. The enhanced services use information about the network which ... Read More
Inventors: Phillips, Stuart G.; Li, Anthony J.; Katz, David M.;, Assignee: Cisco Systems, Inc. (San Jose, CA) |
System and method for providing television services
The present invention provides an approach for viewer-friendly and virtually instantaneous transitioning from a first analog based television program to a second program, particularly an interactive a... Read More
Inventors: Howe, Wayne R.; Danner, III, Fred Thomas; Mauney, John R.;, Assignee: |
System for controlling an internally-installed cache memory
An object of the present invention is to maintain consistency between a main memory and an internally-installed cache even when the portion of the logical address other than the offset portion is used... Read More
Inventors: Ohta, Hidenobu; Sato, Taizo;, Assignee: Fujitsu Limited (Kawasaki, JP) |
Record track identification and following
It is therefore an object of the present invention to provide an improved servo sector pattern in a flexible disc memory wherein the addresses of the record tracks is embedded in the servo blocks. Thi... Read More
Inventors: Andresen, Rolf;, Assignee: International Business Machines Corporation (Armonk, NY) |
Servo control apparatus
OF THE PREFERRED EMBODIMENT FIG. 1 illustrates a data storage medium 10 and a servo control apparatus or circuit 12 for use in relation to the storage medium 10. While the principles of the present i... Read More
Inventors: Alaimo, Ben;, Assignee: Syquest Technology (Fremont, CA) |
Sterile back surgical gown with anchored belt pouch
It is the general object of this invention to provide an improved back belt arrangement in which the protective pouch for the belt end is releasably anchored to the adjacent gown materials so that the... Read More
Inventors: Welke, Karen E.;, Assignee: Will Ross, Inc. (Milwaukee, WI) |
Apparatus for reproducing digital data
Therefore an object of the present invention resides in providing an improved digital data reproducing apparatus which eliminates the drawbacks mentioned above. And another object of the invention is ... Read More
Inventors: Yoshinaka, Tadaaki;, Assignee: Sony Corporation (Tokyo, JP) |
Real time digital signal processor idle indicator
OF THE DRAWINGS FIG. 1 is a schematic block diagram of the presently preferred exemplary embodiment of a digital signal processing system 10 in accordance with the present invention. System 10 includ... Read More
Inventors: Vea, Matthew J. J.;, Assignee: Northern Telecom Limited (Montreal, CA) |
Methods and system for using multi-block bursts in half duplex subscriber unit transmissions
The present invention fulfills this need by providing a wireless communications system comprising a half-duplex subscriber unit for transmitting at least two successive blocks of data in a transmit bu... Read More
Inventors: Hardin, Tom;, Assignee: Cirrus Logic, Inc. (Fremont, CA) |
Master-target based arbitration priority
The problems outlined above are in large part solved by a remote communication system of the present invention. The remote communication system includes a system management module (SMM) which can be i... Read More
Inventors: Tavallaei, Siamak; Kotzur, Gary B.;, Assignee: Compaq Computer Corporation (Houston, TX) |
Single chip remote access processor
The single chip integrated remote access processor of the present invention has a plurality of communication interface units, including a local area network (LAN) interface unit, a first multi-protoco... Read More
Inventors: Kumar, Shailendra; Sonnek, Christopher D.;, Assignee: LSI Logic Corporation (Milpitas, CA) |
Method and system for supporting non-deterministic burst lengths in a memory system employing extended data out(EDO)DRAM
The problems outlined above are in large part solved by a computer memory system in accordance with the present invention. Broadly speaking, the present invention contemplates a computer system employ... Read More
Inventors: Mergard, James Oliver;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Method and system for dynamically assigning addresses to an input/output device
OF THE PREFERRED EMBODIMENTS In the following description, reference is made to the accompanying drawings which form a part hereof, and in which is shown, by way of illustration, several embodiments ... Read More
Inventors: Beardsley, Brent Cameron; Meritt, Allan Samuel; Paulsen, Michael Aloysius; Yudenfriend, Harry Morris;, Assignee: International Business Machines Corporation (Armonk, NY) |
Unstable data recognition circuit for dual threshold synchronous data
The present invention is a circuit that allows digital data acquisition instruments to recognize when dual threshold synchronous data being monitored is unstable. Each data line being monitored for un... Read More
Inventors: Jackson, Ronald M.;, Assignee: Tektronix, Inc. (Beaverton, OR) |
Automatic pin circuitry shutoff for an integrated circuit
In accordance with the preferred embodiment of the present invention, a method and circuitry is provided which allow for the prevention of tester induced failures and reliability problems which occur ... Read More
Inventors: Wehrmacher, John R.;, Assignee: VLSI Technology, Inc. (San Jose, CA) |
Input level detection circuit
According to one aspect of the present invention, an apparatus for activating a logic device when the logic device is required to perform an operation is provided. The logic device is configured to re... Read More
Inventors: Moench, Jerry O.;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Stack caching method with overflow/underflow control using pointers
Accordingly, the present invention provides a stack management unit including a stack cache to accelerate data retrieval from a stack and data storage into the stack. In one embodiment, the stack mana... Read More
Inventors: Koppala, Sailendra;, Assignee: Sun Microsystems, Inc. (Palo Alto, CA) |
Image recording device
It is a principal object of the present invention to provide an image recording device capable of contiguously recording a plurality of images based on image signals, which are different in size and s... Read More
Inventors: Shoji, Tsuyoshi; Yumoto, Toshiharu; Sakata, Takashi;, Assignee: Fuji Photo Film Co., Ltd. (Kanagawa, JP) |
Image recording apparatus having a small-capacity frame memory and an image recording method
Accordingly, it is a primary object of the present invention to provide an image recording method capable of reducing the capacity of a frame memory and of recording images with high image quality. A ... Read More
Inventors: Mochizuki, Yasuyuki;, Assignee: Fuji Photo Film Co., Ltd. (Kanagawa, JP) |
Method and apparatus for unwinding image data
The present invention solves the above problems by providing a method and apparatus for reformatting (or unwinding) graphics images in a bit map memory from a row-ordered format to a column-ordered fo... Read More
Inventors: Russell, William C.; Emerson, H. Brad; Ip, Tony K.;, Assignee: Canon Information Systems, Inc. (Costa Mesa, CA) |
System having an address generating unit and a log comparator packaged as an integrated circuit seperate from cache log memory and cache data memory
It is an object of the present invention to propose a computer architecture not subject to the above difficulties. It is another object of the present invention to propose a cache-based computer archi... Read More
Inventors: Moussouris, John P.; Crudele, Lester M.; Przybylski, Steven A.;, Assignee: MIPS Computer Systems, Inc. (Mountain View, CA) |
Re-configurable block length cache
The invention concerns a cache having a cache memory for storing a plurality of data words, such as, instruction words in blocks of memory. The cache has a mechanism for selecting between a first cach... Read More
Inventors: Schnizlein, Paul G.; Walters, Jr., Donald M.;, Assignee: Advanced Micro Devices,Inc. (Austin, TX) |
Detecting the presence of a device on a computer system bus by altering the bus termination
It is simple to detect when an ISA board drives values onto the data bus different from the bus' undriven state--the I/O or memory read returns a value other than the undriven data bus value 0 FFh on ... Read More
Inventors: Tucker, Brian B.; Belmont, Brian V.;, Assignee: Compaq Computer Corp. (Houston, TX) |
Conversion of multilevel digital data to binary data
The above-described disadvantages of the prior art are overcome with the present invention and an improved system for converting a multilevel digital video signal into a binary video signal is provide... Read More
Inventors: Suzuki, Kazuhiro; Murayama, Noboru;, Assignee: Ricoh Company, Ltd. (JP) |
Data storage buffer system and method
The problems with the methodologies discussed above have been alleviated by the present invention. In general, the present invention provides a system and method for striping data to multiple storage ... Read More
Inventors: Cheney, Dennis P.; Yagley, Jr., Robert J.; Wolski, Mark J.; Petruski, Andrew E.; Boston, Josephine A.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Binary input processing in a computer using a stack
With reference now to the drawing, it may be seen that the various blocks depicted therein are interconnected by lines, both narrow and heavy. The heavy lines indicate a plurality of electrical lead ... Read More
Inventors: Edelman, Brian S.; Robinson, Jr., Ralph L.;, Assignee: Ford Motor Company (Dearborn, MI) |
Apparatus for alternatively accessing single port random access memories to implement dual port first-in first-out memory
It is, therefore, an object of the present invention to utilize conventional single port random access memory to perform the function of dual port FIFO memory. It is another object of the present inve... Read More
Inventors: Drako, Dean M.; Yu, Hsin-Tung A.;, Assignee: Apple Computer, Inc. (Cupertino, CA) |
Circuit for designating instruction pointers for use by a processor decoder
FIG. 2 schematically illustrates an instruction pointer designation circuit 200 in accordance with the present invention. A temporary instruction pointer ("TIP") register 102 holds a TIP value that p... Read More
Inventors: Phillips, Christopher E.; Nemirovsky, Mario;, Assignee: National Semiconductor Corporation (Santa Clara, CA) |
Methods and apparatus for translating incompatible bus transactions
Circuit arrangements and methods are disclosed for upgrading an 040-based personal computer system using an optional, peripheral add-in card. In one embodiment, the present invention comprises a Power... Read More
Inventors: Yazdy, Farid A.; Dhuey, Michael J.;, Assignee: Apple Computer, Inc. (Cupertino, CA) |
Data-array processing system wherein parallel processors access to the memory system is optimized
OF THE PREFERRED EMBODIMENTS Preferred embodiments of the invention will now be described, by way of a non-limiting example, with reference to the drawings, in which FIGS. 4, 8, 9, 22 to 24 and 48 ar... Read More
Inventors: Trevett, Neil F.; Neave, John W.;, Assignee: 3Dlabs Ltd. (Egham, GB) |
I/O Systems 
