Serial data receiving device having a memory for storing a reception permit signal which enable or disable the device from hand-shaking with the transmitting device
The present invention has been devised to solve the problems discussed above, and a principal object of the present invention is to provide a serial data transfer apparatus in which a receiving device... Read More
Inventors: Suzuki, Katsunori;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Data output buffer control circuit of a synchronous semiconductor memory device
It is, therefore, an object of the present invention to enable a data output buffer control apparatus of a synchronous semiconductor memory device to operate in synchronism with an externally supplied... Read More
Inventors: Yoo, Hak-Soo; Won, Jong-Hak;, Assignee: Samsung Electronics Co., Ltd. (Suwon, KR) |
Self-regulating clock generator
The invention therefore provides a clock generator for providing an output clock signal for clocking a microprocessor having first and second speed paths requiring first and second minimum execution t... Read More
Inventors: Witt, David B.; McMinn, Brian D.;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Data processor having wait state control unit
Therefore, an object of the present invention is to provide a data processor having an improved wait state control circuit. Another object of the present invention is to provide a wait state control u... Read More
Inventors: Yoshimatsu, Norifumi;, Assignee: NEC Corporation (Tokyo, JP) |
Multiple mode memory module
OF THE INVENTION Referring first to FIG. 1 there is shown in block diagram form a portion of an information processing system 10. System 10 includes a system bus 12 which couples together a number of... Read More
Inventors: Mann, Edward D.;, Assignee: Wang Laboratories, Inc. (Lowell, MA) |
System for loading initial program loader routine into secondary computer without bootstrap ROM
What is claimed is: 1. Circuit apparatus for executing an initial program loader routine from a secondary computer connected via a shared random-access volatile memory to a primary computer, comprisin... Read More
Inventors: Kopp, Dieter; Hormann, Thomas; Ackermann, Uwe;, Assignee: Alcatel N.V. (Amsterdam, NL) |
Reversible computer apparatus and methods of constructing and utilizing same
The invention provides a reversible computer apparatus capable of executing instructions in both a forward execution mode and a reverse execution mode, and includes a microprocessor means having a plu... Read More
Inventors: Cezzar, Ruknet;, Assignee: |
Full duplex buffer management and apparatus
The present invention provides for a buffer management system to dynamically allocate priority between two buffer memories, a receive memory and a transmit memory, when accessing a storage device havi... Read More
Inventors: Runaldue, Thomas J.; Dwork, Jeffrey Roy;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Dynamic storage synchronizer using variable oscillator and FIFO buffer
The present invention adds a variable rate oscillator and a FIFO buffer to a dynamic storage subsystem based upon CCD or an analogous technology. The rate at which the dynamic storage subsystem is clo... Read More
Inventors: Trost, John R.;, Assignee: Sperry Corporation (New York, NY) |
Token-based serialisation of instructions in a multiprocessor system
It is the task of the invention to provide a process for the serialisation of instructions in a multiprocessor system. In this case, the need to serialise specified commands arises from the fact that ... Read More
Inventors: Pfeffer, Erwin; Getzlaff, Klaus-Joerg; Gaertner, Ute; Tast, Hans-Werner;, Assignee: International Business Machines Corporation (Armonk, NY) |
Method and apparatus for transferring data in parallel from a smaller to a larger register
OF THE DRAWING Referring to FIG. 1, there is provided in a prior known apparatus for transferring data in parallel from a smaller to a larger register designated generally as 1, a 16 stage data regis... Read More
Inventors: New, Bernard J.;, Assignee: Advanced Micro Devices, Inc. (Sunnyvale, CA) |
Synchronous semiconductor memory device
The principal object of the present invention is to provide a synchronous semiconductor memory device enabling high speed operation and random writing. Briefly speaking, in a first synchronous semicon... Read More
Inventors: Iwamoto, Hisashi; Konishi, Yasuhiro; Dosaka, Katsumi; Murai, Yasumitsu;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP) |
Memory device with multiple internal banks and staggered command execution
According to the present invention, a memory device has an array of memory cells arranged in a plurality of subarrays, with each subarray having the memory cells arranged in rows and columns. Commands... Read More
Inventors: Ryan, Kevin J.; Wright, Jeffrey P.;, Assignee: Micron Technology, Inc. (Boise, ID) |
Synchronous semiconductor memory device operable in a plurality of data write operation modes
An object of the invention is to provide an SDRAM which allows easy adjustment of an internal data transfer mode in accordance with a clock to be used. Another object of the invention is to provide an... Read More
Inventors: Sato, Nobuyuki; Iwamoto, Hisashi;, Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP); Mitsubishi Electric Engineering Co., Ltd. (Tokyo, JP) |
Latched type clock synchronizer with additional 180.degree.-phase shift clock
An object of this invention is to provide an internal clock circuit in an integrated circuit that will create an internal clock signal that is synchronized with from an external system clock signal. A... Read More
Inventors: Tien, Li-Chin; Wang, Gyh-Bin;, Assignee: Etron Technology, Inc. (Hsin-Chu, TW) |
Programmable bit line drive modes for memory arrays
Accordingly, it is an object of the present invention to provide an improved memory array. It is a another object of the present invention to provide a programmable memory array that is programmably c... Read More
Inventors: Iadanza, Joseph Andrew; Keyser, III, Frank Ray;, Assignee: International Business Machines Corporation (Armonk, NY) |
Serial bus interface capable of transferring data in different formats
Accordingly, it is an object of the present invention to provide a serial bus interface which has overcome the above mentioned drawback. Another object of the present invention is to provide a serial ... Read More
Inventors: Iwamoto, Shinichi;, Assignee: NEC Corporation (Tokyo, JP) |
Data transmitting method
It is a primary object of the invention to solve the above problems and present a faster data transmitting method. A method of communicating data between a sending device and a receiving device via a ... Read More
Inventors: Takai, Mamoru;, Assignee: Megasoft, Inc. (Suita, JP) |
Self timed interface
An object of this invention is the provision of a cost effective bus data transfer system that can operate at high data transfer rates without tight control of the bus length, and without system clock... Read More
Inventors: Ferraiolo, Frank D.; Capowski, Robert S.; Casper, Daniel F.; Jordan, Richard C.; Laviola, William C.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Digital phase-lock loop control system
It is an object of this invention to implement a PLL function. It is also an object of this invention to eliminate analog-to-digital (A/D) conversions and arithmetic processing as used in the prior ar... Read More
Inventors: Woodman, Jr., Gilbert R.;, Assignee: International Business Machines Corporation (Armonk, NY) |
Data output buffer of a semiconducter memory device
It is therefore object of the present invention to provide a semiconductor memory device capable of preventing ineffective data from being output. It is another object of the present invention to prov... Read More
Inventors: Kim, Chull-Soo; Jang, Hyun-Soon;, Assignee: Samsung Electronics Co., Ltd. (Suwon, KR) |
Synchronous DRAM having a high data transfer rate
Accordingly, it is an object of the present invention to provide a semiconductor memory which has overcome the above mentioned problems of the prior art. Another object of the present invention is to ... Read More
Inventors: Matsubara, Yasushi; Ishioka, Hiroshi;, Assignee: NEC Corporation (Tokyo, JP) |
High-speed synchronous write control scheme
A semiconductor memory device having pairs of data lines for reading and writing data signals to and from a matrix of memory cells is disclosed. The memory device includes a novel SDRAM architecture f... Read More
Inventors: Ternullo, Jr., Luigi; Stephens, Jr., Michael C.;, Assignee: Vanguard International Semiconductor Corporation (Hsinchu, TW) |
Universal timing controller for video tape recorder servo system of different formats using time multiplexed switching network
An advantage this invention is to provide a semiconductor integrated circuit device (microcomputer) which constitutes, e.g., the servo system of a household VTR having an enhanced compatibility. The a... Read More
Inventors: Iwata, Katsumi;, Assignee: Hitachi, Ltd. (Tokyo, JP) |
Elasticity buffer for data/clock synchronization
OF PREFERRED EMBODIMENT The present invention has application to any data transfer system that utilizes a protocol in which the transmitter supplies an extra symbol or data element to the receiver on... Read More
Inventors: James, David V.; North, Donald N.; Stone, Glen D.;, Assignee: Apple Computer, Inc. (Cupertino, CA) |
Computer systems and methods for pipelined transfer of data between modules
Synchronous Global Bus The chief object of the present invention is to perform fast block transfers between local memories that communicate over a multi-master global bus. Attaining this object requir... Read More
Inventors: Wakerly, John F.;, Assignee: Alantec Corporation (San Jose, CA) |
Dynamic random access memory system
It is object of the present invention to minimize the number of address control pins and signal lines required to access a DRAM while maximizing the usage such that all DRAM pins approximately have eq... Read More
Inventors: Ware, Frederick A.; Dillon, John B.; Barth, Richard M.; Garrett, Jr., Billy W.; Atwood, Jr., John G.; Farmwald, Michael P.;, Assignee: Rambus, Inc. (Mountain View, CA) |
Optical clock distribution system
OF THE PREFERRED EMBODIMENT In the following detailed description of the preferred embodiment, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of... Read More
Inventors: Bausman, Marvin D.; Swanson, Vernon W.;, Assignee: Cray Research, Inc. (Eagan, MN) |
Modular bus with single or double parallel termination
Single Channel Bus In one embodiment of a modular single channel bus architecture, a master bus device is coupled to one or more slave bus devices on a motherboard with a bus. A socket on the bus per... Read More
Inventors: Dillon, John B.; Nimmagadda, Srinivas; Moncayo, Alfredo;, Assignee: Rambus, Inc. (Mountain View, CA) |
Memory controller with low skew control signal
OF THE PREFERRED EMBODIMENTS Prior to discussing the preferred embodiments of the invention, a brief discussion of the principles of operation of the invention is provided. In particular, to describe... Read More
Inventors: Jeddeloh, Joseph M.; Rooney, Jeffrey J.; Nicholson, Richard F.; Klein, Dean A.;, Assignee: Micron Electronics Inc. (Nampa, ID) |
I/O Systems 
