Apparatus and method for automatically adjusting frequency and phase of pixel sampling in a video display

DETAILED DESCRIPTION In view of the foregoing deficiencies of prior art video displays, the present invention provides an apparatus and method for automatically adjusting the pixel sampling clock frequency and phase to match the frequency and phase of the pixel clock used to generate an incoming video signal.
The present invention provides an apparatus and method for detecting voltage transitions between pixel intensities in a video signal.
The voltage transitions are compared with pixel sampling clock pulse signals of the video display in order to correctly match the frequency and phase of the video signal and the pixel sampling clock to produce a more stable and noise-free image on the video display.
The present invention includes a differentiator, a threshold detector, a phase comparator, a processor, a memory, and a phase adjuster.
A video signal is received and processed by the differentiator to produce a voltage pulse in response to voltage transitions.
The output signal of the differentiator is applied to the threshold detector which generates a pulse signal if the applied voltage pulse exceeds a predetermined threshold voltage.
Voltage pulses exceeding the predetermined threshold voltage are interpreted to be transitions between pixels in the video signal.
Each pulse signal from the threshold detector is applied to the phase comparator that outputs a hit flag to the processor if the phase comparator detects a pixel sampling clock signal in proximity to the leading edge of the pulse signal from the threshold detector.
This voltage transition (or edge detection) process is repeated a designated number of times for a specific phase setting of the pixel sampling clock.
The processor stores in memory the number of times (hits) where transitions between pixel instructions and pixel sampling clock pulse signals occur temporally proximate to one-another for that specific phase.
The processor then varies the phase of the pixel sampling clock via the phase adjuster and repeats the process