Digital circuit for suppressing changes in a digital signal

DETAILED DESCRIPTION Accordingly, it is one object of the invention to provide a digital circuit with which the aforementioned disturbances can be eliminated.
In accordance with the principles of the invention, as far as changes in the individual bits of the digital signal are concerned, disturbances superimposed on the digital signal behave just as changes in the ideal digital signal.
Further in accordance with the principles of the invention, the unwanted signals can be suppressed if those changes in the digital signal whose signs are opposite to those of signal changes at previous instances of the clock signal are suppressed.
In accordance with the invention, for the clocked suppression of multidigitsignal changes whose signs are opposite to those of signal changes at previous instants of a clock signal, and thus for supporting noise in digital signals occurring in color-television sets with digital signal processing circuitry, parallel signal processing is employed.
The digital signal is applied to a first delay element providing a delay equal to the period of the clock signal, and to the subtrahend input of a first subtracter.
The output of the first delay element is connected to the minuend input of the first subtracter and to the first input of a first adder.
The output of the first subtracter is coupled to the input of a symmetrically limiting accumulator.
The output of the accumulator is connected to the second input of the first adder and the accumulator's range of accumulation is equal to the range of values of the changes to be suppressed.