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Home Image Analysis Highly-reliable-hermetically-sealed-package-for-a-semiconductor-device

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 Highly reliable hermetically sealed package for a semiconductor device

Details
Inventors: Kida, Susumu; Usami, Hayato; Aoki, Hideji;
Assignee: Fujitsu Limited (Kawasaki, JP)
Primary Examiner:
Assistant Examiner:
Attorney, Agent or Firm:

A semiconductor device having a hermetically sealed package which includes a package substrate having a gold layer, an integrated-circuit chip attached to the gold layer, a terminal metal chip attached to the gold layer so as to ground the terminal metal chips leads, bonding wires, a cap, and glass layers for sealing the device. The terminal metal chip has a lower coating layer made of a gold-silicon type of alloy for attachment. The bond strength of the terminal metal chip is not decreased although a heat treatment is carried out to seal the glass.

DETAILED DESCRIPTION An object of the present invention is to prevent the bond strength of a terminal metal chip from deteriorating.
Another object of the present invention is to provide a semiconductor device having a highly reliable hermetically sealed package.
These and other objects of the present invention can be achieved by providing a semiconductor device comprising a package substrate having a gold layer, an integrated-circuit chip attached to the gold layer, a terminal metal chip attached to the gold layer, and bonding wires.
According to the present invention, the terminal metal chip being provided with a lower coating layer made of a gold-silicon (AuSi) type of alloy and joined to the gold layer.
It is preferable that the AuSi type of alloy coating layer be a AuSi alloy or a AuGeSi alloy.
It is preferable that the silicon content of the AuSi alloy be from 1.
0 to 8.
0 wt %, taking the melting point (370.
degree.
C.
) of the AuSi eutectic alloy into consideration.
In a case where the lower coating layer of the AuGeSi alloy is formed on a metal base of the terminal metal chip and the obtained terminal metal clip is attached to the gold layer of the package substrate and then heated in the sealing step, the present inventors found that the bond strength of the terminal metal chip is not decreased although in the case of the prior art bond strength of a terminal metal chip with a AuGe alloy coating layer is decreased by heating during the sealing step.
It is preferable that the silicon content and the germanium content of the AuGeSi alloy be from 0.
3 to 3 wt % and not more than 12 wt %, respectively.



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