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 Message digest instructions

Details
Inventors: Lundvall, Shawn D.; Smith, Sr., Ronald M.; Yeh, Phil Chi-Chung;
Assignee: International Business Machines Corporation (Armonk, NY)
Primary Examiner: Zand; Kambiz
Assistant Examiner: Lashley; Laurel
Attorney, Agent or Firm: Campbell; John E.

A method, system and computer program product for digesting data in storage of a computing environment. The digesting computes a condensed representation of a message or data stored in the computer storage. A COMPUTE INTERMEDIATE MESSAGE DIGEST (KIMD) and a COMPUTE LAST MESSAGE DIGEST (KLMD) instruction are disclosed which specify a unit of storage to be digested by a secure hashing algorithm.

DETAILED DESCRIPTION OF THE INVENTION The message digest instructions discussed herein are for computing a condensed representation of a message or data file.
The compute intermediate message digest and the compute last message digest instructions will first be discussed, followed by a discussion of the preferred computer system for executing these instructions.
In the alternative, a second preferred computer system which emulates another computer system for executing these instructions will be discussed.
Compute Intermediate Message Digest (KIMD) FIG.
1 is representation of the Compute Intermediate Message Digest (KIMD) instruction in the RRE instruction format.
Compute Last Message Digest (KLMD) FIG.
2 is a representation of the Compute Last Message Digest (KLMD) instruction in the RRE instruction format; A function specified by the function code in general register 0 is performed.
Bits 16 23 of the instruction and the R1 field are ignored.
Bit positions 57 63 of general register 0 contain the function code.
FIGS.
3 and 4 show the assigned function codes for COMPUTE INTERMEDIATE MESSAGE DIGEST and COMPUTE LAST MESSAGE DIGEST, respectively.
All other function codes are unassigned.
Bit 56 of general register 0 must be zero; otherwise, a specification exception is recognized.
All other bits of general register 0 are ignored.
General register 1 contains the logical address of the leftmost byte of the parameter block in storage.
In the 24-bit addressing mode, the contents of bit positions 40 63 of general register 1 constitute the address, and the contents of bit positions 0 39 are ignored.
In the 31-bit addressing mode, the contents of bit positions 33 63 of general register 1 constitute the address, and the contents of bit positions 0 32 are ignored.
In the 64-bit addressing mode, the contents of bit positions 0 63 of general register 1 constitute the address.
The function codes for COMPUTE INTERMEDIATE MESSAGE DIGEST are shown in FIG.
3.
The function codes for COMPUTE LAST MESSAGE DIGEST are shown in FIG



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