Method for clock pulse synchronization

DETAILED DESCRIPTION It is the object of the present invention to provide a method of the above-mentioned type which is able to substantially suppress the above-described getting-caught and permits much faster synchronization.
The solution is effected as follows: By means of a second linkage circuit in the timing error detector, the two complex signals from the bandpass filters are linked together to form a second control signal u.
sub.
TR in such a manner that the two control signals u.
sub.
TR and u.
sub.
TI can be interpreted as the real component and the imaginary component of a complex control value u.
sub.
T =u.
sub.
TR +ju.
sub.
TI.
The two control signals u.
sub.
TR and u.
sub.
TI are subjected to averaging.
Thereafter, the thus averaged values u.
sub.
TR and u.
sub.
TI are evaluated by means of an evaluation circuit to form an actuation value .
delta.
which actuates the timing error correction circuit.
The method according to the invention has the advantage that the above-described getting-caught is substantially suppressed and thus synchronization can take place much faster.
The additional costs for this are relatively low.