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Method for the manufacture of a pn junction with high breakdown voltage
| Details |
Inventors: Stengl, Reinhard; Goesele, Ulrich; Fellinger, Christine;
Assignee: Siemens Aktiengesellschaft (Berlin and Munich, DE)
Primary Examiner: Roy; Upendra
Assistant Examiner:
Attorney, Agent or Firm: Hill, Van Santen, Steadman & Simpson
A method for the manufacture of a pn junction having a high breakdown voltage at the boundary surface of a semiconductor body, utilizing a mask which has a relatively large opening for introducing a dopant therethrough into the semiconductor body, the mask having a marginal edge which extends laterally beyond the edge of the relatively large opening. In the marginal edge, the mask is provided with smaller, auxiliary openings, the openings being sized and spaced such that lesser amounts of dopant pass through the opening as the distance of the auxiliary openings from the edge of the relatively larger opening increases. Upon introducing the dopant into the semiconductor body through the mask, there is generated a doping profile which gradually approaches the boundary surface with increasing distance from the edge of the relatively large opening. |
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DETAILED DESCRIPTION The present invention provides a method which guarantees the manufacture of an area-saving pn junction possessing a high breakdown voltage. In accordance with the present invention, we provide a mask having a relatively large opening for implanting or diffusing a dopant therethrough, the mask having a marginal edge extending laterally beyond the edge of the relatively large opening. The mask in the marginal edge has smaller, auxiliary openings, usually arranged in rows, the openings being sized and spaced such that lesser amounts of dopant pass through the openings as the distance of the auxiliary openings from the edge of the relatively large opening increases. Thus, upon passing a dopant through the mask into the semiconductor, there is generated a doping profile gradually approaching the boundary surface as the distance from the edge of the relatively large opening increases. The method of the present invention enables the manufacture of pn junctions which despite a relatively small area, have a breakdown voltage which corresponds to the breakdown voltage for the part of the pn junction which proceeds parallel to the boundary surface of the semiconductor body, i. e. , it corresponds to the volume breakdown voltage. In the preferred embodiment of the invention, the auxiliary openings are located in discrete rows, and are in the form of spaced apertures. In another form of the invention, the marginal portion of the mask may include a plurality of sets of auxiliary openings which are laterally spaced beyond the first set but are preferably identical in configuration to the first set. Then, when introducing dopant into the semiconductor, it is possible to selectively introduce through the various sets of auxiliary openings by covering selected sets of the auxiliary openings to prevent passage of dopant therethrough.
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