Noise suppression circuit for a video signal

DETAILED DESCRIPTION What is claimed is: 1.
A noise suppression circuit for a video signal, comprising a delay circuit having a time delay of substantially one field period and a combining circuit in which an output signal of the delay circuit is combined with an input signal, characterized in that the actual time delay of the delay circuit is switchable between one field period minus half a line period for alternate field scanning periods and one field period plus half a line period for the intervening field scanning period.
2.
A noise suppression circuit as claimed in claim 1, characterized in that said noise suppression circuit further comprises a separation circuit for separating an applied video signal into a high-frequency component and a low-frequency component.
3.
A noise suppression circuit as claimed in claim 2, for a PAL television signal, characterized in that the separation circuit forms part of said delay circuit and is arranged in a signal path after delay means having a time delay which is switchable from field to field between a field period minus two and a half line periods and a field period minus one and a half line periods.
4.
A noise suppression circuit as claimed in claim 2, characterized in that the separation circuit is arranged in a signal path after a subtracting circuit, the inputs of which are respectively coupled to an input of the noise suppression circuit and to an output of the delay circuit, while a high-frequency output of the separation circuit is coupled to an input of an adder circuit a further input of which is connected to a low-frequency output of the separation circuit via a further adder circuit and a circuit having a variable transfer factor, while a further input of the further adder circuit is coupled to the output of the delay circuit.




Description:
BACKGROUND OF THE INVENTION The invention relates to a noise suppression circuit for a video signal, comprising a delay circuit having a time delay of substantially one field period and a combining circuit in which an output signal of the delay circuit is combined with an input signal