Read systems for 21/2D coincident current magnetic core memory

DETAILED DESCRIPTION In accordance with the invention, bit lines of a two-line 21/2D coincident current magnetic core memory are arranged for reading to be physically in parallel with unused bit lines for balanced capacitive and inductive coupling between a word drive line and the parallel bit drive lines.
Any noise signal in the selected bit line and its parallel unused bit lines are thus capacitively and inductively balanced for cancellation at the input of bit sense amplifiers.
In one exemplary embodiment, the other unselected bit lines are paired dummy lines physically in parallel with selected bit lines connected to opposite ends of a sense transformer.
The paired dummy lines are connected to opposite ends of a primary winding of a second transformer having its secondary winding in series with the secondary winding of the sense transformer.
In a preferred embodiment, the physically parallel bit lines are two sets of paired and folded bit lines, only one set of which is selected by switching means to receive bit drive current.
The unselected pair corresponds to the dummy lines of the exemplary embodiment.
Diode switches are provided to automatically connect the unselected pair to opposite ends of the primary winding of the second transformer.
The arrangement is otherwise the same as in the exemplary embodiment.
The bit read out is sensed by a differential amplifier as the signal difference between the selected set.
In another preferred embodiment, the physically parallel bit lines are only two in a set and both have the same word line.
One bit line is selected to conduct half select current from a source at one end of the primary winding of a bit sensing transformer connected to a differential sense amplifier, but the other (unselected) bit line connected to the same half select current source is not.
Instead, diode switching means automatically connects the unselected bit line to the other end of the primary winding of the sense transformer.
This allows only a trickle of current through the unselected bit line so that its cores cannot be switched by the common X word drive line