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Selectively-enabled-image-signal-processing-circuit-using-recursive-filtering

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OF AN EXEMPLARY EMBODIMENT Referring generally to FIGS. 1 and 2, the present invention relates to ...

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Selectively enabled image signal processing circuit using recursive filtering

Details

Inventors: Fujiwara, Naohisa;
Assignee: Mitsubishi Denki Kabushiki Kaisha (Tokyo, JP)
Primary Examiner: Shepperd; John W.
Assistant Examiner:
Attorney, Agent or Firm: Sughrue, Mion, Zinn, Macpeak & Seas

A switch circuit is provided in an operation circuit of an image signal processing circuit device in which a chroma signal reproduced from a VTR is passed through a recursive comb type filter to derive a vertical high frequency component therefrom. A low level component thereof is inverted in phase, and an inverted component is summed with the chroma signal to reduce the noise component of the chroma signal to suspend operation of the operation circuit for a color burst period during a standard speed recording reproducing mode period to thereby provide a chroma signal whose noise component is reduced at an output of the operation circuit for that period.

DETAILED DESCRIPTION The present invention was made in view of the above facts, and an object of the present invention is to provide an image signal processing circuit by which the problems produced by passing the input chroma signal through the conventional image signal processing circuit are eliminated and the degradation of image quality is minimized.
The image signal processing circuit according to the present invention in which a signal obtained by passing an input signal through a recursive comb-type filter is processed to remove noise components contained in the input signal or a high frequency component thereof is enhanced is featured by comprising means for suspending an operation of an operation circuit for a predetermined period of time to provide the input signal as an output signal during that time period.
That is, in accordance with the present invention, only a high frequency signal supplied to the operation circuit is blocked for the predetermined time period so that the operation circuit provides an output signal which is the same as the input signal thereto.

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