Array substrate for liquid crystal display and method for fabricating the same

DETAILED DESCRIPTION Accordingly, the present invention is directed to an array substrate for a liquid crystal display and method for fabricating the same that substantially obviate one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide an array substrate for a liquid crystal display and a fabricating method thereof that are adaptive for reducing the contact resistance between a two-layer structured drain electrode and a pixel electrode and the contact resistance between a two-layer structured data pad and a data pad terminal electrode.
Additional features and advantages of the invention will be set forth in the description that follows, and in part will be apparent from the description, or may be learned by practice of the invention.
The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an array substrate for a liquid crystal display according to one aspect of the present invention includes a drain electrode formed from different types of metal at the upper portion of the substrate; a first drain contact hole communicating with the drain electrode; a protective layer covering the drain electrode; a second drain contact hole opposite to the first drain contact hole through the protective layer; and a pixel electrode making an electrical side contact with the drain electrode through the first and second drain contact holes.
In the array substrate, the second drain contact hole may have a width lager than or substantially equal to the first drain contact hole.
The array substrate may further include a gate line provided at the substrate to receive a scanning signal; a data line crossing the data line to receive a data signal; a gate electrode connected to the gate line; a gate insulating film covering the gate line and the gate electrode; an active layer overlapping the gate electrode with the gate insulating film therebetween; an ohmic contact layer provided on the active layer and having a hole corresponding to a desired size of channel; and a source electrode connected to the data line and provided with the drain electrode and the desired size of channel