Array substrate with identification mark on semiconductor layer and identification mark forming method thereof

DETAILED DESCRIPTION Accordingly, the present invention is directed to an array substrate of a liquid crystal display device with identification mark and a identification mark forming method of the array substrate of the liquid crystal display device that substantially obviates one or more of problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide an array substrate for liquid crystal display devices with an identification mark.
Another object of the present invention is to provide an identification mark forming method of the array substrate for liquid crystal display devices having a simplified process.
Another object of the present invention is to provide an identification mark forming method having increased productivity.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention.
The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, an array substrate for liquid crystal display devices includes a transparent substrate, a plurality of array cells on the transparent substrate, each of the array cells include a display area and a non-display area having a first identification, and a semiconductor layer including a second identification mark.
In another aspect, an identification mark forming method of an array substrate for liquid crystal display devices includes forming at least one array cell on a transparent substrate, the array cell including a gate line, a gate insulating layer, a transparent amorphous silicon layer, an opaque doped amorphous silicon layer, a data line, a display area, and a non-display area, forming a first identification mark on a marginal blank portion of the transparent substrate by etching the transparent amorphous silicon layer and the opaque doped amorphous silicon layer during an array element forming process, detecting the first identification mark, and forming a second identification mark on the non-display area of each of the at least one array cell after detecting the first identification mark