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Display-control-apparatus

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Display control apparatus

Details

Inventors: Tanaka, Noriaki;
Assignee: Mitsubishi Denki Kabushiki Kaisha (JP)
Primary Examiner: Brigance; Gerald L.
Assistant Examiner: Brier; Jeffery A.
Attorney, Agent or Firm: Leydig, Voit & Mayer

In a display control apparatus wherein a picture signal of a character, a pattern or the like and a luminance signal for affording a luminance to the picture signal are synchronously derived, and a logic between the picture signal and the luminance signal is taken to control the luminance of the picture signal; a display control apparatus comprising pulse width adjusters by which, when one signal is true with the other signal being false, the true signal is put within an interval of the false signal and is held false for fixed times before and after a true signal interval thereof, and when both logics of the respective signals are true or false, true or false intervals of both the signals are adjusted so as to become equal.

DETAILED DESCRIPTION This invention has been made in order to eliminate the problem as stated above, and has for its object to provide an apparatus by which displays as logically determined can be presented for all the combinations of the logics of output signals.
To the accomplishment of the object, the display control apparatus according to this invention is characterized by comprising pulse width adjusters by which, when one signal is true With the other signal being false, the true signal is put within the interval of the false signal and is rendered false for fixed times before and after the true signal interval thereof, and when the logic of both signals are either true or false, the true or false intervals of both signals are adjusted to become equal.
With the pulse width adjusters 13 and 14 according to this invention, when one signal is true with the other signal being false, the true signal is put within the interval of the false signal, and it is rendered false for the fixed times before and after the true signal interval thereof.
In addition, when both logics of the respective signals are either true or false, the true or false intervals of both the signals are adjusted to be equal.

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