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Methods of forming semiconductor-on-insulator substrates
| Details |
Inventors: Yu, Sun-il; Kang, Woo-tag;
Assignee: Samsung Electronics Co., Ltd. (Suwon, KR)
Primary Examiner: Wilczewski; Mary
Assistant Examiner:
Attorney, Agent or Firm: Myers Bigel Sibley & Sajovec
Methods of forming semiconductor-on-insulator substrates include the steps of forming a underlying semiconductor layer to electrically interconnect a plurality of SOI active regions and thereby prevent one or more of the active regions from "floating" relative to the other active regions. The reduction of floating body effects (FBE) improves the I-V characteristics of SOI devices including SOI MOSFETs. A method is provided which includes the steps of forming a second electrically insulating layer having a plurality of first openings therein, on a first face of a first semiconductor substrate. A first semiconductor layer is then formed on the second electrically insulating layer so that direct electrical connections are made between the first semiconductor layer and the first semiconductor substrate. A first electrically insulating layer is then formed on the first semiconductor layer. This first electrically insulating layer is then planarized and bonded to a second semiconductor substrate. The composite intermediate structure is then inverted and followed by the step of planarizing a second face of the first semiconductor substrate to define a second semiconductor layer. A plurality of spaced semiconductor active regions are then defined in the second semiconductor layer by using field oxide isolation techniques to consume the entire thickness of the second semiconductor layer at predetermined spaced locations. This step essentially isolates the active regions from each other, however, these active regions do not "float" because they are electrically connected to each other indirectly through the underlying first semiconductor layer. |
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DETAILED DESCRIPTION It is therefore an object of the present invention to provide improved methods of forming semiconductor-on-insulator substrates and devices and structures formed thereby.
It is another object of the present invention to provide methods of forming semiconductor-on-insulator substrates with reduced susceptibility to floating body effects and devices and structures formed thereby.
It is still a further object of the present invention to provide methods of forming semiconductor-on-insulator substrates with improved short-channel effects and devices and structures formed thereby.
These and other objects, features and advantages of the present invention are provided by methods of forming semiconductor-on-insulator (SOI) substrates which include the steps of forming a underlying semiconductor layer to electrically interconnect a plurality of SOI active regions and thereby prevent one or more of the active regions from "floating" relative to the other active regions, and structures and devices formed thereby.
As will be understood by those skilled in the art, the reduction of floating body effects (FBE) improves the I-V characteristics of SOI devices including SOI MOSFETs.
The use of an interconnecting semiconductor layer may also improve the punchthrough characteristics of SOI MOSFETs by limiting short channel effects.
In particular, according to one embodiment of the present invention, a method is provided which includes the steps of forming a second electrically insulating layer (e.
g.
, SiO.
sub.
2) on a first face of a first semiconductor substrate (e.
g.
, monocrystalline silicon) and then patterning the second electrically insulating layer to define a plurality of first openings therein which expose respective portions of the first face of the first semiconductor substrate.
A first semiconductor layer is then formed on the second electrically insulating layer and in the plurality of first openings therein so that direct electrical connections (e.
g.
, ohmic contacts) are made between the first semiconductor layer and the first semiconductor substrate
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