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 Semiconductor die bumping method utilizing vacuum stencil

Details
Inventors: Cho, Yeuk-Chow;
Assignee: Motorola, Inc. (Schaumburg, IL)
Primary Examiner: Chaudhuri; Olik
Assistant Examiner: Chambliss; Alonzo
Attorney, Agent or Firm: Rodriguez; Robert A.

A method of bumping a semiconductor device, including the steps of providing a semiconductor device (100) having a plurality of bumping sites (104), providing a plurality of solder spheres (210), providing a stencil (200) having a plurality of stencil sites (202), each stencil site (202) having a depression and a through hole (204) extending through the stencil(200), placing the plurality of solder spheres (210) on the stencil such that each stencil site of the plurality of stencil sites (202) holds a single solder sphere of the plurality of solder spheres (210), applying a vacuum to the plurality of solder spheres (210), through the vacuum through holes (204), aligning the plurality of solder spheres (210) with the plurality of bumping sites (104) of the semiconductor device (100), releasing the vacuum to release the plurality of solder spheres (210) from the stencil (200) such that the plurality of solder spheres (210) is placed on the plurality of bumping sites (104), and reflowing the plurality of solder spheres (210). A method for packaging a semiconductor die utilizing a stencil and applying vacuum is also disclosed.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS FIG.
1 illustrates the overall flow chart for carrying out various process steps according to the present invention.
Reference will be made to FIG.
1 in connection with the more detailed steps shown in FIGS.
2-7.
First, solder spheres 210, typically on the order of 25-200 microns in diameter, are provided as indicated in step 8.
Preferably, the solder spheres 210 are on the order of 50-150 microns, more preferably, 75-150 microns.
Further, depending upon the particular materials of the substrate and thermal history of the semiconductor device, etc.
, any one of known compositions for the solder may be utilized.
For example, 97/3 (i.
e.
, 97% Pb, 3% Sn) high lead solder may be utilized in connection with ceramic substrates.
However, due to the lower melting point of plastic substrates, eutectic solder may also be utilized.
Both eutectic and 97/3 high lead solder spheres in various sizes are commercially available.
Then, as shown in step 10, the solder spheres are inspected for uniformity according to conventional techniques.
For example, an optical imaging system may be utilized to identify non-uniform solder spheres, such as spheres having a defect or non-spherical shape beyond a certain tolerance.
Then, as shown in FIG.
2, step 12 provides a semiconductor die 100 having a polyimide passivation layer 102 and a plurality of bumping sites 104 that form an array.
Semiconductor die 100 is formed of silicon or other semiconducting starting material.
Various conducting and insulating layers are typically grown, deposited, and etched to form integrated circuitry on the starting substrate material.
The details of integrated circuitry formation is not important for the purposes of understanding the present invention.
Therefore, the starting material and integrated circuitry are collectively represented in FIG.
1 semiconductor die 100.
Flux 106 (a conventional material to aid in solder reflow) is provided on the semiconductor die 100 to aid in attachment of solder bumps to the bumping sites 104, described in more detail below



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