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 Self-aligned MESFET having reduced series resistance

Details
Inventors: Yeh, Keming W.;
Assignee: Xerox Corporation (Stamford, CT)
Primary Examiner: Edlow; Martin H.
Assistant Examiner:
Attorney, Agent or Firm:

Disclosed herein is a structure and process for a self-aligned metal semiconductor field effect transistor having the characteristics of a high speed, high density, low power LSI circuit and specifically an improved high device gain MESFET device using conventional photographic techniques. The inventive MESFET device has improved high device gain as a result of the elimination of series resistance, increased circuit integration density, and improved speed capability due to the elimination of spacings between gate and drain and gate and source and the improved high device gain.

DETAILED DESCRIPTION It is accordingly an object of the present invention to fabricate a high speed, high density, low power LSI circuit with improved high gain self-aligned MESFET devices using conventional photographic techniques.
An additional object is to provide a MESFET with improved high device gain as a result of elimination of series resistances.
Yet another object is to provide a MESFET with increased circuit integration density.
An additional object is to provide a MESFET with improved speed capability due to the improved high device gain.



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