Enhancement-depletion logic based on gaas mosfets

DETAILED DESCRIPTION To minimize the limitations in the prior art described above, and to minimize other limitations that will become apparent upon reading and understanding the present specification, the present invention discloses a method of forming an oxide layer on a layer of gallium arsenide, including the steps of depositing a layer of aluminum arsenide on the layer of gallium arsenide, of exposing the layer of aluminum arsenide to an oxidizing gas mixture so that the aluminum arsenide is oxidized to aluminum oxide, and of controlling excess arsenic released in the aluminum oxide released in the exposing step, so as to ensure enhanced electrical properties in the aluminum oxide.
An object of the invention is to provide an insulating gate layer for a GaAs field effect transistor by forming an oxide layer on GaAs and controlling excess arsenic so as to maintain high resistivity in the oxide layer and to avoid the formation of interface surface states which degrade transistor performance.
Another object of the invention is to provide a complementary metal-insulator-semiconductor logic device based on gallium arsenide field effect devices.