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Home MEMS Masking-layer-having-narrow-isolated-spacings-and-the-method-for-forming-said-masking-layer-and-the-method-for-forming-narrow-isolated-trenches-defined-by-said-masking-layer

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 Masking layer having narrow isolated spacings and the method for forming said masking layer and the method for forming narrow isolated trenches defined by said masking layer

Details
Inventors: Roberts, Ceredig; Reinberg, Alan R.;
Assignee: Micron Technology, Inc. (Boise, ID)
Primary Examiner: Turner; Archene
Assistant Examiner:
Attorney, Agent or Firm: Collier; Susan B.

An etch mask having a narrow spacer layer self-aligned and adjacent to a first portion of an inorganic first layered segment. An inorganic second layered segment comprises a portion of the etch mask and encompasses a perimeter of the first layered segment and is distanced from the first layered segment by a distance equal to a thickness of the narrow spacer layer. A first portion of the second layered segment is adjacent to the narrow spacer layer. A void exists between second portions of the first and the second layered segments. The area of the substrate exposed by the etch mask of the invention, when etched, forms a trench whose width is limited only by the width of the void which is equal to the width of the narrow spacer layer. The narrowness of the narrow isolated trench formed using the etch mask of the invention maximizes die space.

DETAILED DESCRIPTION This invention utilizes a primary mask of photoresist, created using conventional photolithography, to create the inorganic mask of the invention, having a vertical film layer segment defining narrow isolated spacings.
The primary mask patterns a silicon dioxide layer segment, also referred to as a mask island.
The silicon dioxide layer segment is part of the inorganic mask and two of its opposing sides define the inner walls of the narrow isolated spacings.
An expendable spacer layer is deposited on top of the silicon dioxide layer segment and an exposed starting substrate.
The starting substrate may be fabricated to overlie other substrates; such would be the case when a silicon substrate is fabricated to overlie a sapphire substrate.
This is known as silicon on sapphire (SOS).
The thickness of the expendable spacer layer determines the width of the isolated trenches in the secondary mask.
The width may be as narrow as 0.
1.
mu.
.
The spacer layer may be polycrystalline silicon deposited by LPCVD.
A thick inorganic protective layer is blanket deposited on top of the spacer layer, the primary consideration being that the spacer layer must be etchable with a high degree of selectivity over the protection layer.
A blanket deposition of photoresist follows which results in the planarization of the in-process wafer.
The protective layer and photoresist are then plasma etched at the same rate in order to expose the spacer layer adjacent to and capping the silicon dioxide segment, the balance of the spacer layer remaining covered by the protective layer.
Next opposing ends of the silicon dioxide layer segment are masked to protect at least a width of the ends equal to the thickness of the spacer layer.
The foregoing process creates the secondary etch mask.
At this point, the exposed portions of the spacer layer are etched away to create the narrow isolated spacings and to expose the substrate that is adjacent to the two opposing sides of the silicon dioxide layer segment that was not masked



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