 Solid state image sensing device |
| Accordingly, the object of the present invention is to provide a solid state image sensing device ... |
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| Device for one-sided etching of a semiconductor wafer |
| We claim: 1. An etching box type device for one-sided etching of a semiconductor wafer, said device ... |
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Method for forming a dielectric layer
| Details |
Inventors: Kim, Ju-Wan; Hwang, Byung-Keun; Kim, Sung-Jin; Lee, Jue-Goo; Cho, Chang-Hyun; Koh, Gwan-Hyeob;
Assignee: Samsung Electronics Co., Ltd. (Suwon, KR)
Primary Examiner: Fourson; George
Assistant Examiner: Estrada; Michelle
Attorney, Agent or Firm: Law Offices of Eugene M. Lee, PLLC
A dielectric layer is formed by depositing a first dielectric layer above a semiconductor substrate including recessed regions, etching the first dielectric layer to remove any voids and to lower the aspect ratio of the recessed regions, and depositing a second dielectric layer on the first dielectric layer in the recessed regions. The method is particularly useful when the aspect ratios are high for recessed regions formed between patterns. |
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DETAILED DESCRIPTION The present invention was made in view of the above problems.
Therefore, a feature of the present invention is directed toward providing a method of forming a void-free dielectric layer in a highly integrated device.
In accordance with one aspect of the present invention, there is provided a method of forming a void free dielectric layer on a semiconductor topology having recessed regions.
A first dielectric layer is deposited over the semiconductor topology.
The first dielectric layer is etched to leave a part of the first dielectric layer at bottom portions of the recessed regions.
A second dielectric layer is deposited over the semiconductor topology to fill up remainders of the recessed regions.
In accordance with another aspect of the present invention, there is provided a method of forming a dielectric layer in spaces between spaced apart gate lines with an insulating layer thereon, the gate lines having been formed on a semiconductor substrate.
A first inter-layer dielectric layer is deposited over the semiconductor substrate to fill the spaces.
The first inter-layer dielectric layer is etched to leave a part of the first inter-layer dielectric on the spaces.
A second inter-layer dielectric layer is deposited over the semiconductor substrate to fill up the remainders of the spaces.
Each of the first and second inter-layer dielectric layers includes material having an etch selectivity with respect to the insulating layer.
In accordance with another aspect of the present invention, there is provided a method of forming a dielectric layer.
A trench is formed in a semiconductor substrate by etching.
A first dielectric layer is deposited over the substrate including the trench.
The first dielectric layer is etched to leave part of the first dielectric layer on a bottom of the trench.
Finally, a second dielectric layer is deposited over the substrate to fill up the remainder of the trench.
In accordance with another aspect of the present invention, there is provided a method of forming a dielectric layer
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MEMS 
