Method for integrating thermistor

DETAILED DESCRIPTION The present invention introduces a new temperature sensing device and method for making such device.
The device is a highly sensitive thermistor that is easy to fabricate and can be readily incorporated into all kinds of ICs.
The thermistor of the present invention can even be readily used in ICs having VLSI devices and be integrated into SOI or SOI strained substrates, and is more immune to the problems of prior art sensors.
FIGS.
1 4 illustrate a first embodiment of the present invention.
In this first embodiment of the invention, a thermistor is formed in a process also used to form a self-aligned silicide, that is, a "salicide".
In FIG.
1, a cross-sectional view is provided of an initial fabrication stage using a semiconductor-on-insulator substrate such as a silicon-on-insulator (SOI) substrate.
In recent years, silicon-on-insulator technology (SOI) has been gaining popularity as a way to improve transistor performance.
The use of SOI substrates tends to decrease parasitic junction capacitance, leading to improvements in speed, reduced power consumption, better frequency response, and resistance to soft errors, while helping to address manufacturability concerns.
Many of the advantages provided by a SOI substrate stem from its structure.
SOI substrates have a structure in which an active device layer of a single crystal semiconductor such as silicon is formed over an insulating layer of the substrate.
The insulating layer acts to eliminate capacitance between devices formed in the active device layer and the lower bulk layer of the substrate, and to prevent the development of electrical paths through the substrate, which can ultimately degrade or destroy surface devices.
The insulating layer is typically a layer of buried oxide (BOX) formed below the surface of a silicon wafer, formed by a process such as separation by implantation of oxygen (SIMOX).
Alternatively, well-known bonding processes may also be used to form the SOI wafer.
In FIG.
1, the bulk silicon portion of the substrate is also shown at 50 and the BOX layer is shown at 120