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Home MEMS Method-for-making-a-piezoresistive-pressure-sensor-of-semiconductor-material-employing-anisotropic-etching

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 Method for making a piezoresistive pressure sensor of semiconductor material employing anisotropic etching

Details
Inventors: Hartauer, Siegbert;
Assignee: Texas Instruments Deutschland GmbH (DE)
Primary Examiner: Trinh; Michael
Assistant Examiner:
Attorney, Agent or Firm: Kempler; William B., Donaldson; Richard L.

A semiconductor device comprises a piezoresistive pressure sensor (12), which has a membrane (14), which is constituted by a conducting epitaxy layer (16), which is applied to a conducting semiconductor substrate (18) of the opposite conductivity. On the outer surface (20) of the membrane facing away from the semiconductor substrate (18) at least one piezoresistor (22) is incorporated. Between the semiconductor substrate (18) and the epitaxy layer (16) an annularly structured intermediate layer (28) is incorporated, which defines a region (26'), adjoining the inner surface (24) of the membrane, of an opening (26) extending through the semiconductor substrate (18). This opening (26) is produced by anisotropic semiconductor etching, the intermediate layer (28) having a conductivity which is opposite to that of the semiconductor substrate so that this intermediate layer (28) functions as an etch stopping means and is not attacked by the etchant.

DETAILED DESCRIPTION In order to attain this object in the semiconductor device in accordance with the invention, an annularly structured conducting intermediate layer which has a conductivity opposite to that of the semiconductor substrate is introduced, between the semiconductor substrate and the epitaxy layer.
The intermediate layer is the region, adjoining the inner surface of the membrane, about the opening penetrating the semiconductor substrate.
Owing to this design the part, which forms the membrane, of the epitaxy layer is definitively set by the annularly structured, intermediate layer, which is incorporated between the semiconductor substrate and the epitaxy layer.
Since this intermediate layer has a conductivity, which is opposite to that of the semiconductor substrate, it is possible for this intermediate layer to serve as an etch stopper for the electrochemical anisotropic semiconductor etching so that any departures in the positioning of the rear side mask from a desired position and any fluctuations in thickness of the substrate fail to have any effect on the critical opening part, which sets the limits of the membrane.
Since the membrane limits as determined by the rear opening are always exactly reproducible, it is also possible to position the piezoresistors on the front side with the necessary accuracy in relation to the edge of the membrane, that is to say more particularly at a position, at which the membrane has its maximum stress field.
The relative positioning of the piezoresistors is consequently practically only dependent on the accuracy of adjustment of the planar technology which is employed to produce each respective layer structure of the semiconductor device.
Such a respective membrane preferably has a plurality of monocrystalline piezoresistors associated with it, which for example are able to be connected with one another in a resistor bridge.
Such piezoresistors, which are preferably provided on the flexure-sensitive points of the membrane, may with advantage be constituted by a respective zone, which is doped with impurity atoms, in the membrane consisting of monocrystalline semiconductor material



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