Method for making a wafer-pair having sealed chambers

DETAILED DESCRIPTION We claim: 1.
A method for making a wafer-pair having deposited layer plugged sealed chambers, comprising: growing a thermal layer on a first side of a first silicon wafer; depositing a nitride layer on the thermal layer; depositing, patterning and removing portions of first metal layer on the nitride layer for a plurality of devices; depositing, patterning and removing portions of a second metal layer on the nitride and first metal layers for the plurality of devices; patterning and removing material from the first silicon wafer and layers on the first side of the first silicon wafer and from a second side of the first silicon wafer to make a plurality of pump-out ports through the first silicon wafer and layers on the first silicon wafer; masking and removing material from a first side of a second silicon wafer to form a plurality of recesses in the first side of the second silicon wafer; forming a sealing ring on the first side of the second silicon wafer around each of the plurality of recesses; and positioning the first side of the first silicon wafer next to the first side of the second silicon wafer; and wherein: each sealing ring is in contact with at least one of the layers on the first side of the first silicon wafer; each recess of the plurality of recesses results in a chamber containing at least one device of the plurality of devices; each sealing ring encloses at least one pump-out port of the plurality of pump-out ports; and the first and second silicon wafers are effectively a bonded together set of wafers.
2.
The method of claim 1, further comprising: placing the set of wafers in an environment of a vacuum wherein a vacuum occurs in each chamber via the at least one pump-out port; and depositing a layer of material on the second side of the first silicon wafer and the plurality of pump-out ports on the second side of the first silicon wafer, wherein each chamber is sealed from the environment.
3.
The method of claim 2, further comprising baking out the set of wafers prior to depositing the layer of material on the second side of the first wafer and the plurality of pump-out ports on the second side of the first silicon wafer