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| OF SPECIFIC EMBODIMENTS FIGS. 1 and 2 are isometric views showing a micro-gyro device. FIG. 1 ... |
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Blazed grating light valve |
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Method and apparatus for detecting wafer flaw |
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Method of forming an isolation oxide for silicon-on-insulator technology |
| OF THE DRAWINGS A method of forming an isolation oxide on a silicon-on-insulator (SOI) substrate ... |
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Combined trench isolation and inlaid process for integrated circuit formation |
| OF THE PRESENT INVENTION Generally, the present invention is an improved method for manufacturing ... |
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Method of forming trench isolation |
| In view of the problems with the prior art described above, the present invention aims at providing ... |
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Apparatus and method for forming controlled deep trench top isolation layers |
| OF PREFERRED EMBODIMENTS This disclosure relates to semiconductor devices and more particularly, ... |
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Fabrication of a shallow trench isolation by plasma oxidation |
| It is therefore a primary objective of the present invention to provide a method of fabricating an S... |
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Self-scanning light-emitting array and a driving method of the array |
| It is an object of the present invention to solve the conventional problems, e.g., the number of ... |
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Efficient inspection of light-gathering rate of microlens in solid state imaging device |
| It is an object of the present invention to provide a solid state imaging device which makes it ... |
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Method of anodic wafer bonding
| Details |
Inventors: Hays, Kenneth M.;
Assignee: Boeing North American, Inc. (Seal Beach, CA)
Primary Examiner: Dang; Trung
Assistant Examiner:
Attorney, Agent or Firm: Silberberg; Charles T.
A process is provided for protecting, containing, and/or completing fragile microelectronic and microelectromechanical (MEM) structures on a low conductivity substrate during anodic wafer bonding of a covering wafer. The wafer includes raised areas that contact the substrate at selected bonding regions to support the wafer as a covering structure over the substrate. The covering wafer includes additional raised areas, such as pillars or posts, that contact selected electric circuit lines on the substrate to form temporary shorts through the wafer. During anodic bonding of the wafer to the substrate, the temporary shorts maintain the connected circuit lines and microstructures at nearly the same electric potential to prevent unwanted arcing and electrostatic forces that could damage the fragile structures. The pillars or posts can be formed at the same time as the raised bonding areas, but on unwanted and otherwise unused portions of the covering wafer. Anodic bonding produces only weak bonds between the wafer posts and the metallic conductor material of the circuit lines. After anodic bonding, the unwanted portions of the covering wafer can be removed to leave covering structures over the selected microstructures. Because of the weak bonds, removal of the unwanted portions of the wafer also removes the posts and eliminates the temporary shorts, with no additional processing needed to electrically separate the circuit lines on the substrate. |
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DETAILED DESCRIPTION The present invention comprises an improved process for protecting fragile microelectronic and microelectromechanical (MEM) structures on a low conductivity substrate during anodic wafer bonding of a covering wafer. The covering wafer includes raised areas that contact the substrate at selected bonding regions to support the wafer as a cover to protect, contain, and/or complete the microstructures formed on a substrate. In the present invention, the covering wafer is formed to include additional raised areas, such as pillars or posts, that contact selected areas of electric circuit lines on the substrate to form temporary shorts through the wafer. During anodic bonding of the covering wafer to the substrate, a high voltage electric potential is applied across the substrate and covering wafer. The high electric potential causes current to flow for bonding the raised areas of the wafer to the regions of contact with the substrate. The temporary shorts maintain the connected circuit lines and microstructures at nearly the same electric potential during anodic bonding of the wafer to the low-conductivity substrate. This prevents unwanted arcing and electrostatic forces that could cause flexing, contact, bonding, or other damage to the fragile structures and circuit lines. The additional pillars or posts that contact the circuit lines are formed at the same time as the raised bonding areas, but on the unwanted and otherwise unused portions of the covering wafer. The process of anodic bonding produces only weak bonds between the wafer posts and the metallic conductor material of the electric circuit lines. After anodic bonding, the unwanted portions of the covering wafer can be removed by sawing, laser cutting, etching, or other suitable techniques, to leave covering structures over selected microstructures. Because of the weakly bonded temporary contacts of the wafer posts, removal of the unwanted portions of the wafer also removes the posts and eliminates the temporary shorts, all in one step, so that no additional processing is needed to electrically separate the circuit lines on the substrate
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