Multiple-gate MOSFET device with lithography independent silicon body thickness and methods for fabricating the same

DETAILED DESCRIPTION The following presents a simplified summary in order to provide a basic understanding of one or more aspects of the invention.
This summary presents one or more concepts of the invention in a simplified form as a prelude to the more detailed description that is presented later and is not an extensive overview of the invention.
In this regard, the summary is not intended to identify key or critical elements of the invention, nor does the summary delineate the scope of the invention.
The invention relates to triple-gate and other multi-gate MOS transistors and methods for fabricating such transistors, in which the transistors are constructed from a semiconductor body formed above a starting structure using a form structure or mold and spacers, rather than by etching into an SOI wafer.
This allows control over channel dimensions independent of lithography limitations and avoidance or mitigation of the adverse effects of etched channel surfaces, while attaining the advantages of multi-gate devices (e.
g.
, inversion of more channel silicon, reduction in short channel effects, reduced DIBL, etc.
), using less expensive starting structures (e.
g.
, silicon wafers, etc.
).
In addition, the spacers may be formed (e.
g.
, L-shaped) so as to create an undercut or re-entrant cavity at the bottom of the formed semiconductor body.
The gate structure can be formed to extend within the undercut recess, thus providing for quadruple-gate or 3.
5-gate transistors having semiconductor bodies smaller than a lithographically patterned gate length dimension.
In one example, a form structure is provided over a semiconductor wafer with an opening exposing a portion of the wafer.
A spacer is formed along sidewalls of the opening and semiconductor material is deposited in the opening by epitaxial growth, and the form structure and the spacer are then removed.
A gate structure is thereafter formed along the top and sides of a central portion of the formed semiconductor body.
The spacer may be L-shaped, providing an undercut or recess at the bottom of the semiconductor body sidewall, and the gate may extend into the undercut area to underlie a portion of the resulting transistor channel