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Process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction
| Details |
Inventors: Toet, Daniel; Sigmon, Thomas W.;
Assignee: The Regents of the University of California (Oakland, CA)
Primary Examiner: Picardat; Kevin M.
Assistant Examiner:
Attorney, Agent or Firm: Staggs; Michael C., Carnahan; L. E., Thompson; Alan H.
A process for direct integration of a thin-film silicon p-n junction diode with a magnetic tunnel junction for use in advanced magnetic random access memory (MRAM) cells for high performance, non-volatile memory arrays. The process is based on pulsed laser processing for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metals deposited onto low temperature-substrates such as ceramics, dielectrics, glass, or polymers. The process preserves underlayers and structures onto which the devices are typically deposited, such as silicon integrated circuits. The process involves the low temperature deposition of at least one layer of silicon, either in an amorphous or a polycrystalline phase on a metal layer. Dopants may be introduced in the silicon film during or after deposition. The film is then irradiated with short pulse laser energy that is efficiently absorbed in the silicon, which results in the crystallization of the film and simultaneously in the activation of the dopants via ultrafast melting and solidification. The silicon film can be patterned either before or after crystallization. |
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DETAILED DESCRIPTION It is an object of the present invention to provide a non-linear element (switch) between two metal conductors in an electric circuit that is fabricated directly onto one of the metal conductors.
A further object of the invention is to provide a process allowing the construction of a silicon diode or transistor directly onto a metal word or bit line, without damage to underlying or adjacent components.
Another object of the invention is to provide a process, based on pulsed laser processing, for the fabrication of vertical polycrystalline silicon electronic device structures, in particular p-n junction diodes, on films of metal deposited on low temperature-substrates, such as ceramics, dielectrics, glass, or polymers.
Another object of the invention is to provide a process for direct integration of a thin-film, Si p-n junction diode, or transistor, with a magnetic tunnel junction stack for use in advanced, high-performance magnetic random access memory cells.
Other objects and advantages of the present invention will become apparent from the following description and accompanying drawings.
The process of the present invention is suitable for implementation of current-perpendicular-to-plane (CPP) magnetic tunnel junction memory cells (MTJs) for use in non-volatile, high-performance, high-density magnetic random access memories.
Such a memory cell consists of a magnetic storage device connected in series with a current control device such as a diode or transistor whose purpose is to control the current in the cell.
Such cells are described in detail in U.
S.
Pat.
Nos.
5,640,343 and 5,838,608.
The purpose of this current control device is to provide selectivity in the read process for a selected cell (i.
e.
, preventing unwanted currents from flowing through other unselected cells and causing erroneous read signals) and to isolate the selected memory cell from write currents used in the write process.
The process allows direct integration of the current control element vertically with the magnetic element at low temperatures
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MEMS 
